In previous blog we covered a brief overview of how the OLED display works in microscopic level and also understood various types of OLED displays available in the market . In this blog we’ll be discussing how to configure the SSD1306 display with the microcontroller and we’ll be making the embedded driver as well.128×64 display is a dot matrix display , hence 128×64 =8192 total pixels . It is by turning on/off these pixels we display graphical image of any shape . It is the current provided to each pixel that varies the brightness. HARDWARE DESCRIPTION OLED Display chosen is driven by SSD1306 Driver IC although they are other ICs such as SSD1331 which can be used to drive the display . These ICs are CMOS OLED Driver controller for dot-matrix system . OLED has 256 brightness steps .Besides 128×64 , 128×32 display resolution is also available. Specification of ssd1306 128×64 OLED Display Type: OLED (Organic Light Emitting Diode) Display Size: 128×64 pixels Display Driver: ssd1306 Display Colors: Monochrome (White), Yellow, and Blue Operating Voltage: 3.3V to 5V Interface: I2C Operating Current: ~20mA Display Structure OLED DISPLAY is mapped using GDDRAM page structure OF SSD1306 GDDRAM or graphic display ram is a bit mapped static RAM . It holds the bit pattern to be displayed. The GDDRAM having size 128×64 is divided into 8 pages from PAGE 0 TO PAGE 7 which is used for monochrome matrix display . When data bit D0 – D7 is sent the row0 gets filled with D0 and D7 is written into the bottom row. Display has 64 rows , 128 columns divided into 8 pages . Each page has 128 columns and 8 rows. Display 128 columns known as segments For displaying the graphical data in the first location , page address and column address both are set to 0 with the end address of page and column also being selected End of column and End of the page is 7FH and 07H respectively SSD1306 BLOCK DIAGRAM PIN ARANGEMENT SSD1306 FUNCTIONAL BLOCK DIAGRAM SSD1306 BLOCK DIAGRAM PIN ARANGEMENT SSD1306 FUNCTIONAL BLOCK DIAGRAM ADDRESSING MODE 1. PAGE ADDRESSING MODE 2.Horizontal Addressing Mode 3.Vertical Addressing Mode 1. PAGE ADDRESSING MODE In page addressing mode, after the display RAM is read/written, the column address pointer is increased automatically by 1. If the column address pointer reaches column end address, the column address pointer is reset to column start address but page address pointer not points to next page. Hence, we need to set the new page and column addresses in order to access the next page RAM content. We need to set lower two bits to ‘1’ and ‘0’ for Page Addressing Mode. In page addressing mode, the following steps are required to define the starting RAM access pointer location: Set the page start address of the target display location by command B0h to B7h. Set the lower start column address of pointer by command 00h~0Fh. Set the upper start column address of pointer by command 10h~1Fh 2.Horizontal Addressing Mode In horizontal addressing mode, after the display RAM is read/written, the column address pointer is increased automatically by 1. If the column address pointer reaches column end address, the column address pointer is reset to column start address and page address pointer is increased by 1. When both column and page address pointers reach the end address, the pointers are reset to column start address and page start address We need to set last two digits to ‘0’ and ’0’ for horizontal addressing mode. 3.Vertical Addressing Mode In vertical addressing mode, after the display RAM is read/written, the page address pointer is increased automatically by 1. If the page address pointer reaches the page end address, the page address pointer is reset to page start address and column address pointer is increased by 1. When both column and page address pointers reach the end address, the pointers are reset to column start address and page start address. We need to set last two digits to ‘0’ and ’1’ for vertical addressing mode. In normal display data RAM read or write and horizontal/vertical addressing mode, the following steps are required to define the RAM access pointer location: Set the column start and end address of the target display location by command 21h. Set the page start and end address of the target display location by command 22h. Hardware Pinout SDAThis pin is used to send data between master and slave with the acknowledgement of the master SCLThis is a clock signal that helps keeps the process in synchronization VCCA power supply of 3.3 V is required . More than 3.3V may damage the module GNDThis ground pin is connected to the ground supply ALGORITHM Select the I2C slave address and specify the operation that will be performed i.e Read 0x79 or Write 0x78. #define SSD1306_I2C_ADDR 0x78 Set the clock divide ratio and oscillator frequency . Bit 3-0 sets the clock divide ratio , Bit 7-4 sets the oscillator frequency SSD1306_WRITECOMMAND(0xD5); //–set display clock divide ratio/oscillator frequency SSD1306_WRITECOMMAND(0xF0); //–set divide ratio Set the multiplex ratio switching to any value ranging from 16-63 SSD1306_WRITECOMMAND(0xA8); //–set multiplex ratio(1 to 64) Display start line addressing in which the starting address of the display ram is determined . In our case this is set to zero and RAM row 0 is mapped to col 0 SSD1306_WRITECOMMAND(0x40); //–set start line address Set memory addressing mode using page addressing mode, horizontal addressing mode, vertical addressing mode. SSD1306_WRITECOMMAND(0x10); //00,Horizontal Addressing Mode;01,Vertical Addressing Mode;10,Page Addressing Mode (RESET);11,Invalid SSD1306_WRITECOMMAND(0xB0); //Set Page Start Address for Page Addressing Mode,0-7 Set column address using a triple byte first specifies the column setting , second column start and third column end . Do the same for the page SSD1306_WRITECOMMAND(0x00); //—set low column address SSD1306_WRITECOMMAND(0x10); //—set high column address Set pre-charge period and VCOMH deselect level SSD1306_WRITECOMMAND(0xDB); //–set vcomh Entire display is on using A4H and A5H command SSD1306_WRITECOMMAND(0xA4); //0xa4,Output follows RAM content;0xa5,Output ignores RAM content The normal functionality of the
In the previous blogs we discussed how to read uid of different tags . Now as discussed in the applications of the rfid cards , the rfid tags can be used to store employee information so as to access certain restricted area. The rfid tags can also be used by retail stores to store customer information and points earned with each shopping. In this blog we’ll be learning how data reading or writing works by looking at the memory map of MIFARE 1K Tag and how to read and write the data using rc522. UNDERSTANDING THE MEMORY MAP OF MIFARE 1K TAG The memory of the MIFARE 1K Tag is divided into 15 sectors and each sector is divided into 4 blocks , within each block 16 bytes of data is stored Hence 16 Sectors * 4 Blocks * 16 Bytes=1024 Bytes = 1K The 0th Block of Sector 0 is used to store manufacturer data , this is usually 4 Byte UID(MIFARE 1K TAG, MIFARE Mini Tag) certain tags are available such as MIFARE Plus , MIFARE Desfire etc that has 7 Byte UID There are 3 data blocks presents in each sector and the last block in each sector is known as sector trailer.The 3 data blocks are used to store user data and the trailer block is used to deter mine the access conditions for all the blocks of the sector . The access conditions include Read , Write , Increment , Decrement ,Transfer and Restore. Each sector trailer consists of following information:- A mandatory 6 Byte Key A. 4 Bytes for Access Bits. Optional 6 Byte Key B (if not used, data can be stored). MEMORY ORGANIZATION MANUFACTURER BLOCK SECTOR TRAILER ACCESS CONDITIONS MEMORY ORGANIZATION MANUFACTURER BLOCK SECTOR TRAILER ACCESS CONDITIONS FUNCTIONAL DESCRIPTION uint8_t MFRC522_Write(uint8_t blockAddr, uint8_t *writeData) This function takes in 2 arguments the address to which the data has to be written and the array or buffer in which data is stored lets say this to be writedata array. A 8 bit array of 18 length is also intialized to store data which will be transferred to the memory block. Intially CRC is checked using CalculateCRC function using which takes in 3 arguments array in ( whose first 2 values are PICC Write and blockAddress ), len and output array that stores 2 values CRCResultRegL , CRCResultRegM . Next MFRC522_ToCard function is called which takes in 5 arguments command (in this case that will be PCD_Transceive), send data , send length , back length, back data according to various commands processing is done and according to switch cases status is sent Finally MFRC522_ToCard in again called (with PCD_Transceive) and the data is transferred to the FIFODataReg to return with the correct status and finally the PCD is set to idle uint8_t MFRC522_Read(uint8_t blockAddr, uint8_t *recvData) This function is used to read data from a memory block and and put it into a buffer or array hence the argument recvData Similar to uint8_t MFRC522_Write initially the CRC is calculated and MFRC522_ToCard is called. In MFRC522_ToCard the command argument is set to PCD_TRANSCEIVE due to which the code enter the for loop in which the data that was in FIFODataReg is populated in the recvData Buffer. Finally MFRC522_ToCard in again called (with PCD_Transceive) and the data is transferred to the FIFODataReg to return with the correct status and finally the PCD is set to idle uint8_t MFRC522_ToCard(uint8_t command, uint8_t *sendData, uint8_t sendLen, uint8_t *backData, uint *backLen) This function is used to control the MFRC522 according to the command arguments that can be PCD_AUTHENT PCD_TRANSCEIVE Both these commands have different irqEn ,waitIRq that are written into CommIEnReg block which is then cleared using clear bit mask function After finally setting bit mask the PCD is set to idle state The function writes the data in FIFODataReg to the backData buffer and returns the status which is OK in case of no errors STM32CUBE IDE CONFIGURATION FIG 1- PINOUT CONFIGURATION FIG 2 – CONFIGURING THE SPI1 PERIPHERAL CODE #include “main.h” /* Private includes ———————————————————-*/ /* USER CODE BEGIN Includes */ #include “stdio.h” #include “stm32f1_rc522.h” #include “stdio.h” #include “string.h” #include “fonts.h” #include “ssd1306.h” /* USER CODE END Includes */ /* Private typedef ———————————————————–*/ /* USER CODE BEGIN PTD */ /* USER CODE END PTD */ /* Private define ————————————————————*/ /* USER CODE BEGIN PD */ /* USER CODE END PD */ /* Private macro ————————————————————-*/ /* USER CODE BEGIN PM */ /* USER CODE END PM */ /* Private variables ———————————————————*/ I2C_HandleTypeDef hi2c1; SPI_HandleTypeDef hspi1; UART_HandleTypeDef huart1; /* USER CODE BEGIN PV */ void uprintf(char *str) { HAL_UART_Transmit(&huart1,(uint8_t *)str,strlen(str),100); } //uint8_t i; uint8_t status; uint8_t str[5]; // Max_LEN = 16 uint8_t serNum[5]; uint8_t KEY[] = {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}; uint8_t KEY2[]={1,2,3,4,5,6}; uint8_t W[]=”PRATYUSH”;/STEP 1/ uint8_t R[10]=””;/STEP 2/ uint8_t test; /* USER CODE END PV */ /* Private function prototypes ———————————————–*/ void SystemClock_Config(void); static void MX_GPIO_Init(void); static void MX_SPI1_Init(void); static void MX_USART1_UART_Init(void); static void MX_I2C1_Init(void); /* USER CODE BEGIN PFP */ /* USER CODE END PFP */ /* Private user code ———————————————————*/ /* USER CODE BEGIN 0 */ /* USER CODE END 0 */ /** * @brief The application entry point. * @retval int */ int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration——————————————————–*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_SPI1_Init(); MX_USART1_UART_Init(); MX_I2C1_Init(); /* USER CODE BEGIN 2 */ MFRC522_Init(); /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { status = MFRC522_Request(PICC_REQIDL, str); //MFRC522_Request(0x26, str) status = MFRC522_Anticoll(str); memcpy(serNum, str, 5); HAL_Delay(1000); MFRC522_SelectTag(str); test = MFRC522_Auth(PICC_AUTHENT1A,24,KEY,serNum);/STEP 3/ MFRC522_Write((uint8_t)24 , W);/STEP 4/ HAL_Delay(1000); MFRC522_Read(24, R);/STEP 5/ HAL_Delay(1000); if (status == MI_OK) { MFRC522_SelectTag(str); test = MFRC522_Auth(PICC_AUTHENT1A,2,KEY,serNum); /*if((str[0]==0) &&
Overview In this blog we will be discussing another special functionality of GPIO pins I2C or Inter-Integrated Circuit or I2c functionality . I2C is a two wire interface or TWI which was developed by the Philips corporation for use in consumer products . It is a bidirectional bus that can be easily implemented in an IC process.I2C combines best features of SPI as well as UART it lets the user control multiple slaves via multiple masters which is useful when logging data to sd cards or displaying on LCD. Just like SPI the output data bits are synchronized to sampling of the clock shared by both the parties involved in the communication . The master always generates the clock.The protocol finds applications in hardware sensors or displays , reading memory ICs , communicating with microcontrollers , ADC or DACs. I2C Theory I2C consists of 2 lines SCL and SDA 1.SCL (Serial Clock ) – For synchronizing data transfer between master and slave 2, SDA (Serial Data ) – The data transmission or receiving line Multiple Master and Slave lines are connected to the SDA and SCL lines and both these lines are pulled up using resistors to Vdd (5v) Operation Modes In I2C Master Transmitter Master Receiver Slave Transmitter Slave Receiver I2C Clock Speed The speed of the I2C bus should be in reference to the one provided in the datasheet The modes of I2C clock speed are as follows:- Standard-mode : 100 KHZ max Fast-mode: 400 KHz max Fast-mode Plus:1MHz High-speed mode: 3.4 MHz I2C duty cycle specifies the ratio between Tlow and Thigh of the I2C SCL line The values being: I2C_DUTYCYCLE_2=2:1 I2C_DUTYCYCLE_16_9= 16:9 The desired clock speed can be achieved using the appropriate duty cycle to prescale How data is transmitted in I2C Protocol Transactions are initiated and completed by master All the messages have an address frame and data frame Data is placed on SDA when SCL goes low and is sampled after SCL goes HIGH All transactions begin with START and are terminated by STOP A START is defined when SDA goes low from high and SCL is still HIGH A STOP is define when SDA goes HIGH from LOW while SCL is still HIGH Both START and STOP conditions are generated by the master itself Both START and STOP conditions are generated by the master itself Any information on the SDA lines should be 8 Bits long. Each byte must be followed by Acknowledge(ACK) bit. Data is transferred with the MSB first The address frame is sent out first The 7 bit address frame is sent out with the MSB first followed by R/W indicating a read(1) or write(0) operation. The data frame begins transmission after the address frame is sent The SCL will keep on generating clock pulses at regular interval and data will be placed at SDA at regular interval by either master or slave depending it is a write operation or read operation I2C Features in STM32F103 Parallel-bus/I2C protocol converter Multimaster capability: the same interface can act as Master or Slave I 2C Master features: – Clock generation – Start and Stop generation I 2C Slave features: – Programmable I2C Address detection – Dual Addressing Capability to acknowledge 2 slave addresses – Stop bit detection Generation and detection of 7-bit/10-bit addressing and General Call Supports different communication speeds: – Standard Speed (up to 100 kHz) – Fast Speed (up to 400 kHz) Analog noise filter Status flags: – Transmitter/Receiver mode flag – End-of-Byte transmission flag Error flags: – Arbitration lost condition for master mode – Acknowledgment failure after address/ data transmission – Detection of misplaced start or stop condition – Overrun/Underrun if clock stretching is disabled 2 Interrupt vectors: – 1 Interrupt for successful address/ data communication – 1 Interrupt for error condition Optional clock stretching 1-byte buffer with DMA capability Configurable PEC (packet error checking) generation or verification: – PEC value can be transmitted as last byte in Tx mode – PEC error checking for last received byte SMBus 2.0 Compatibility: – 25 ms clock low timeout delay – 10 ms master cumulative clock low extend time – 25 ms slave cumulative clock low extend time – Hardware PEC generation/verification with ACK control – Address Resolution Protocol (ARP) supported PMBus Compatibility I2C Instances in STM32F103 The I2C instances vary from microcontroller to microcontroller i.e the stm32f103c676A has one I2c instance with stm32 f411 RE having I2C1 and I2C2 . The pins for I2C1 are PB7 – This is used as SDA PB6 – This is used as SCL The pins for I2C2 are:- PB3 – This is used as SDA PB10 – This is used as SCL I2C configuration Parameters in STM32F103 Clock Speed This parameter defines the clock speed which as mentioned previously can be 100000 in standard mode and 400000 fast mode. Duty cycle This parameter helps in configuring the HIGH and LOW ratio of the clock and has value 2:1 and 16:9 Ownaddress This parameter takes in the address of the first device which can be 7 bit or 10 bit long Addressing mode This parameter suggests the type of the address size being chosen which can be 7 bit or 10 bit Dualaddressing mode This parameter is used to disable or enable the dual addressing mode of I2C Generalcall addressing mode This parameter is used to disable or enable the general call addressing mode. NOstrech mode This parameters checks the nostrech mode Applications of I2C It is used to scan sensors such as – MPU6050 , BMP280 , PCA 9685 PWM controller, TSL2561 luminosity measurements ADXL345 3 axis accelerometer Ssoled display , 16 x 2 led display CAT24C512 EEPROM 64KB SSD1306 OLED Screen with STM32F103 GEsture sensor with STM32F103 Time of Flight Sensor with STM32F103 INA219 DC Current Sensor with STM32F103 How to configure the I2C peripheral in STM32F103 We would be using STM32 HAL and STM32CubeIDE for using the I2C peripheral in STM32F103 in this blog tutorial series. I2C BLOCK DIAGRAM I2C
Overview So, in this blog we will be covering another alternate functionality of GPIO pins i.e SPI (Serial Peripheral Interface). Previously we hve covered following peripherals implementation in STM32F103 MCU’s. ADC(Analog To Digital Converter) in STM32F103 UART Peripheral in STM32F103 GPIO Peripheral in S32K144 MCU Clock Peripheral in STM32F103 PWM on STM32F103 SPI is a synchronous and full duplex communication between a master and several slave devices. It is used in devices or sensors in which speed is a priority . It operates at data transmission rate 8 Mbits or more. The protocol uses 3 or usually 4 wires for data transmission and receiver .It is used by various sensors and modules such as OLED Display, BMP280 , RC522 , DAC , Shift Registers etc. SPI Theory The SPI uses 2 pins for data transfer SDIN and SDO , SCLK clock for synchronization of data transfer between 2 chips, CE chip select that is used to initiate and terminate the data transfer. SDI = MOSI SDO = MISO SCLK = SCK CE = SS MOSI: MASTER OUT SLAVE IN This pin is used to send data from master to slave MISO: MASTER IN SLAVE OUT Lorem ipsum dolor sit amet, consectetur adipisi cing elit, sed do eiusmod tempor incididunt ut abore et dolore magna SCK: SERIAL CLOCK This is used to generate clock to synchronize data transfer between the master and slave device . This is generated by master SS:SLAVE SELECT Used to select the particular slave to send data . Besides SPI communication the SPI interface can switch between I2S communication protocol that is a synchronous serial communication interface. It supports 4 audio standards including the I2S Philips standard, the MSB- and LSB-justified standards, and the PCM standard. The operating modes can be full duplex(4 wires) and half duplex (6 wires) Multi Mode Configuration Multiple subnodes can be used with a single SPI main. The subnodes can be connected in regular mode or daisy-chain mode. How Data is Transmitted in SPI Initially SCK is enabled that starts the transmission The master sets the SS line low of the slave Data is usually shifted out with most significant bit first , shifting a new least significant bit into the same register Data in slave side is shifted into least significant bit of the register Hence after all the shifting is done the master and slave has transferred the data If more data is to be exchanged the registers are reloaded and the process is repeated When no more data transmission is there the master stops toggling the SCK and deselects the slave using SS SPI Peripheral Bus Modes Before discussing about the various bus modes we will be discussing the clock phase and polarity i.e CPOL:Clock Polarity and CPHA:Clock Phase and it is the combination of CPOL and CPHA that is referred to as Bus Modes. CPOL = 0 Active state of clock = 1 Idle state of clock= 0 Means the sampling on the first edge CPHA = 0 – Data is captured on the rising edge and output on falling edge CPHA = 1 – Data is captured on the falling edge and output on the rising edge CPOL = 1 Active state of clock = 0 Idle state of clock = 1 Means sampling is on the second edge CPHA = 0 – Data is captured on the falling edge and output on rising edge CPHA = 1 – Data is captured on the rising edge and output on the falling edge SPI Features in STM32F103 Full-duplex synchronous transfers on three lines Simplex synchronous transfers on two lines with or without a bidirectional data line 8- or 16-bit transfer frame format selection Multimaster mode capability 8 master mode baud rate prescalers (fPCLK/2 max.) Slave mode frequency (fPCLK/2 max) Faster communication for both master and slave NSS management by hardware or software for both master and slave: dynamic change of master/slave operations Programmable clock polarity and phase Programmable data order with MSB-first or LSB-first shifting Dedicated transmission and reception flags with interrupt capability SPI bus busy status flag Hardware CRC feature for reliable communication: – CRC value can be transmitted as last byte in Tx mode – Automatic CRC error checking for last received byte Master mode fault, overrun and CRC error flags with interrupt capability 1-byte transmission and reception buffer with DMA capability: Tx and Rx requests SPI Instances in STM32F103 SPI instances vary from microcontroller to microcontroller from 1 in stmf103c6t6a to 6 in stm32f7 each having different pins NSS pulse mode , TI mode and hardware crc calculations SPI1 features PA5 as SCK , PA6 as MOSI and PA7 as MISO SPI2 features PB3 as SCK, PB4 as MISO and PB5 as MOSI. NSS Management in SPI protocol for STM32F103 NSS line can to be driven via 2 modes Software Mode- SS is driven internally by firmware Hardware Mode – A dedicated GPIO pin is used to drive the SS line Also NSS features NSS output and output disabled mode. Output mode is used only when device operates in master mode and it is disabled allowing mutli master capability NSS hardware mode must be used in TI mode . CPHA and CPOL are forced to conform to Texas Instrument (TI) protocol requirements. In this NSS signal pulses at the end of every transmitted byte APPLICATIONS OF SPI PROTOCOL Application 1 Memory Devices- SD-Card, MMC, EEPROM and FLASH Application 2 Sensors- Temperature and pressure (BMP280) Application 3 Control Devices -ADC, DAC, Audio Codec Application 4 Others- Camera Lens , RTC, LCD , Touch Screen RFID Module interfacing with STM32F103 W25Q SPI Flash Memory ST77389 LCD Display with STM32F103 NRF24L01 RF Module with STM32F103 How to Configure SPI Peripheral for STM32F103 We would be using STM32 HAL and STM32CubeIDE for using the SPI peripheral in STM32F103 in this blog tutorial series. SPI BLOCK DIAGRAM SPI CONFIGURATION ALERNATE FUNCTION MAPPING CONFIGURATION IN STM32CUBEIDE FIG 1- Selecting MOSI, MISO , SS and SCK pins
In the last blog we discussed what a keypad module is . In this blog we will be discussing how to interface a 4×4 membrane type keypad module with stm32 microcontroller. Although the keypad module can be configured using both polling and interrupt methods , in this blog we will be discussing the interrupt method as it takes less CPU cycles , also since interrupt doesn’t require constant CPU attention. Keypad module along with stm32 microcontroller finds applications in industrial machines as well various projects such as bluetooth door lock , scientific calculator etc. Hardware description The keypad module consists of 3 layers:- The top layer is made of polymer which usually is the printed graphic overlay . It defines the function of each button in the keypad module . It is heat and water resistant and also prevents from electric discharge. The middle layer that usually consists of dome shaped stainless buttons which upon touch makes contact with the bottom layer completing the circuitry. The bottom layer consists of printed circuitry made of conductive material such as silver or copper oxide. When a key is pressed the dome shaped buttons make contact which completes the circuit and this information is conveyed to microcontroller in the form of signal by the external ribbon. The 4×4 keypad module chosen by us consists of numbers from 0 to 9 along with 2 characters ‘*’ and ‘#’ in the first 3 columns while the last column consists of alphabets A, B ,C , D. The internal circuit diagram of the keypad module Internal Circuit Working Circuit Diagram As can be seen one end of each button is connected to a wire that is then connected to the connector pin as row and other end is connected to another wire which is the column wire. Both the row and column wires helps us pinpoint the button that is pressed. The connection are then made to the MCU in which the row part is configured as GPIO output and written high in our case this will be PA15, PB3, PB4 , PB5 pins the column part is then written as GPIO EXTI interrupt which will get triggered in case of a button push , this will be PB6,PB7,PB8,PB9 in our case . As can be seen in the figure since each row from one side is already HIGH once the connection is made by pressing the button this is read by the MCU pins PB6,PB7,PB8,PB9 and the interrupt is raised which is detected in the rising edge. Besides the keypad module connection UART1 is also enable as PA9 as TX and PA10 as RX This will be used to display the button pressed when the interrupt is fired using teraterm or similar software. ALGORITHM Configure pins PA15,PB3,PB4,PB5 as output pins with no pull up and low frequency Configure pins PB6, PB7,PB8, PB9 as interrupt pins with no pull up and interrupt detection on the rising edge Set the NVIC priority as 0 and enable IRQ Incoming interrupts are handled using EXTI callback function Initialize the UART1 function , configure the parameters and select PA9 as tx and PA10 as RX Hal tick function is called to use key debouncing and prevent unwanted input noise from the buttons 2 variables currentMillis and previousMillis are declared which prevents extra activations or slow functions from triggering the interrupts this is done by subtracting the former from latter and the difference should be greater than 10 Each row is written GPIO 1 and checked if the corresponding column is gpio 1 as well. in case both the conditions are satisfied the interrupt is raised and a keypress is detected The keypressed is displayed on Teraterm or similar software using UART1 SOFTWARE CONFIGURATION Open the stm32cube ide and configure the sys mode, select the debug as serial wire and time base source as systick . In the GPIO section select the pins PA15, PB3,PB4, PB5 as output pins set parameters to default which is GPIO pins to no pull and operations at low frequency . Next select the pins PB6,PB7,PB8,PB9 as EXTI interrupt pins also in the NVIC section enable the line EXTI line [9:5] interrupts .Also configure the GPIO EXTI as interrupt rising which would read the occurrence of the interrupt on the rising edge of the wave and operation as low frequency . The NVIC priority is set to 0 (the highest) and the IRQ is enabled. All the button or key presses are handled by HAL_GPIO_EXTI_Callback function in which the keydebouncing is applied and each row is written GPIO HIGH incase a button press the respective column goes high as well raising the interrupt and the corresponding key is displayed using UART .for eg-The button press such as key 9 is detected when both PB3 and PB7 is HIGH as due to the press a connection is made and an interrupt is raised. Also in the connectivity section select the UART1 set the parameters such as mode to asynchronous , baud rate 115200, Word-length as 8 bits , Stop bits as 1 , mode as TX and RX , hardware flow control as none and oversampling rate as 16 . The UART1 has pin PA9 as TX and PA10 as RX . The uart is used to display the key that is pressed on a teraterm or similar software with baud rate set to 115200 SOFTWARE CONFIGURATION CODE #include “main.h” #include #include /* Private includes ———————————————————-*/ char buffer[32]={0}; /* USER CODE BEGIN Includes */ /* USER CODE END Includes */ /* Private typedef ———————————————————–*/ /* USER CODE BEGIN PTD */ /* USER CODE END PTD */ /* Private define ————————————————————*/ /* USER CODE BEGIN PD */ /* USER CODE END PD */ /* Private macro ————————————————————-*/ /* USER CODE BEGIN PM */ /* USER CODE END PM */ /* Private variables ———————————————————*/ UART_HandleTypeDef huart1; /* USER CODE BEGIN PV */ GPIO_InitTypeDef GPIO_InitStructPrivate = {0}; uint32_t previousMillis = 0; uint32_t currentMillis = 0; uint8_t keyPressed = 0;
Table of Contents What are Keypad Modules ? Keypads are input devices that most of us are familiar with that help us communicate with a machine , by pressing a set of buttons or keys and giving it a set of instructions to perform tasks.We see them at ATMs, Phones,,military, even Refrigerators , Vending Machines etc constantly evolving and changing over the years such as membrane keypads,dome-switch keypads, capacitive touch keypads etc. Keypad modules are basically sets of buttons , keys or switches arranged in rows and columns in matrix form which establishes a connection when a button is pressed and this information is transmitted to the machine.Keypads play an important role in human machine communication be it an operator in a factory or a child buying a beverage from a vending machine . But all these variety of applications of the keypads showcases the different types of keypads and the technologies they employ. Types of Keypad Modules 1. Membrane type Membrane type keypad modules are most commonly used in commercial applications as well as household appliances such as refrigerators , coolers, calculators etc. They are made of 3 layers : The top layer that consists of labels and printed text justifying the function of that particular key they are made up of polyester or polycarbonate materials hence the printed material lasts for a long time. This is the only layer that is visible to the user.This layer also prevents charge discharge and is water as well as heat resistant. Space layer that comprises the button which is usually made of stainless steel . They usually have a dome structure that helps them make contact with the bottom layer . Bottom layer that consists of the conductive material, usually silver or copper oxide. The parts where there is a chance of short circuit are painted with a dielectric. When the user presses a key the stainless steel button and the bottom layer comes in contact completing the circuitry which is then sent to the external ribbon as a signal . The size of these layers are as thin as membrane hence the name membrane. Each of the layer is a half of the circuit that is connected to the external ribbon which acts as a communication path between human machine interface. PCB Type The PCB type keypad module consists of a PCB which is designed in such a manner that connections are made between each row and column on which mechanical push buttons are soldered . The connections between rows and columns are then finally ended on the 8 connector pins which are connected to the machine to identify the location of the button pressed.These can be customized as per the need. They are widely used in the phones and cheaper , easy to install and have a relatively long life. Capacitive type The capacitive touch type keypad module as the name implies uses the change in capacitance upon application of the touch as a measure to detect the human interface . The human finger acts as a dielectric which increases the capacitance . This increased capacitance causes an increase in the charging and discharging time which is monitored and classified as touch. These are often used over their counterparts such as resistive type which are slower and less smoother.Since change in capacitance is involved these modules are also sensitive high levels of heat , light , temperature changes, liquid application etc. To counter the behavior of touch keypad modules under the exposure to the liquid the texas instruments keypad module uses mutual capacitance rather than self capacitance to classify a touch and distinguish false touches. Dome Switch It’s a combination of a flat-panel membrane and mechanical-switch keypad. They feature two circuit board traces embedded under a silicone keypad with a dome-shaped switch. These domes create tactile feedback when pressed, making them particularly useful in commercial and work-related applications. Furthermore, dome-switch keypads have a high level of reliability, often lasting for as many as 5 million cycles. Scissor switch type In this keypad module the keys are designed like scissors. They also have a rubber dome key such as in dome switch but they have improved functionality by keeping the keys connected together . They may have better functionality but they tend to be expensive and are high maintenance. They are different Scissor Switch type in the market but in general they have 3 layers. 4 x 3 The 4×3 keypad module as the name suggests consists of 4 rows and 3 columns . Even though as per the requirement the size of the matrix can vary in general the 4×3 are used in industry applications in which only numbers are required to be entered in the machine.Hence the first 3 rows consists of the numbers between 1-9 whereas the last last row consists of *,0,#. 4 x 4 Besides 4X3 the 4×4 keypad is also available in which there are 4 columns and 4 rows. In this besides the numeric values alphabets A, B , C , D are also available in the last column . This keypad module finds application in the security system , industrial control system applications, data entry systems etc. How does Keypad Modules works ? The module usually consists of graphic overlay the part of the module that is visible to the user, It is usually made of polycarbonate or polyester materials that are highly customizable depending on the requirement . The material used makes the printed character to last longer. It also consists of an internal polymer layer which house the internal circuitry and protects from electric discharge and is also heat and water resistant Inside the polymer layer is the button mesh layer usually made of stainless steel dome like structure and second layer of embossed circuitry usually made by printing copper or silver oxide with some dielectrics to prevent short circuit Both these layers are halves of the internal circuitry that completes the circuit when the user presses the button
For the people looking to start with STM32 and looking for its full tutorial blog series on different peripherals of the STM32 Microcontrollers. In This blog get to know about, UART HAL API’s, how to generate the UART code and demo examples based on UART peripheral of STM32.
Table of Contents GPIO Theory So now we’ll talk about GPIO pins . GPIO stands for general purpose input output pins; they are the means for communication between the microcontroller and the external world (using sensors etc).It is signal that arrives on these pins or a signal that is sent or written on these pins that facilitates this communication. These pins can be configured to act as input or output via the application software(in our case stm32cube ide). The programmer can configure the pins as LOW or 0V or HIGH or 3.3V(or 5V ). These GPIO pins can also be configured to act as special purpose pins as well where their alternate functionality is exploited . These alternate functionality includes UART , ADC , SPI etc . In the case of UART communication, Transmitter(Tx) and Receiver(Rx) pins are required. GPIO pins can be configured to act as TX or RX pins . Even in ADC the pins are configured to act as Analog pins having 12 bits of resolution . The alternate functions of various pins are shown below: Input floating Input pull-up Input pull-down Analog Output open-drain Output push-pull Alternate function push-pull Alternate function open-drain GPIO Peripheral in STM32F103 All the pins of STM32F103 are grouped in multiple ports as PORT A, PORT B, PORT C As can be seen from Pin configuration chart in the PA1 stands for Port A Pin 1. There are 37 GPIO pins in stm32f103 which are divided as PORT A with 16 pins, PORT B with 16 pins, PORT C with 3 pins and PORT D with 2 pins. Each GPIO port has two 32-bit configuration registers (GPIOx_CRL, GPIOx_CRH), two 32-bit data registers (GPIOx_IDR, GPIOx_ODR), a 32-bit set/reset register (GPIOx_BSRR), a 16-bit reset register (GPIOx_BRR) and a 32-bit locking register (GPIOx_LCKR). In the register names, x stands for the port to which pin belongs. If we are configuring pin PA1, it has Port A then registers would be accessed by GPIOA_CRL and etc. Out of above-mentioned registers, GPIO peripheral has 2 most important registers: Direction Register(GPIOx_CRL, GPIOx_CRH)</h3 > Direction register: Set the corresponding pin as input/output pin. Data register(GPIOx_IDR, GPIOx_ODR)</h3 > Data register: where we set the Logic level (High (1)/Low (0)), for the corresponding pin if it is configured as output pin or we read the Logic level (High (1)/Low (0)), for the corresponding pin if it is configured as input pin. Pin Configuration Chart Pin Definitions GPIO Peripheral Block Diagram in STM32F103 First after selecting the pin the port is decided Then after following the arrow the busses are selected based on it: APB/APB1 or AHB After which the clock is enabled to the particular port using either __HAL_RCC_GPIOX_CLK_ENABLE() function or using the RCC AHB1 peripheral clock enable register and selecting the port to which clock has to be provided by enabling it. Methods to configure the GPIO Peripheral Configuring the busses i.e AHB1, AHB2, APB1, APB2 . The AHB bus is faster than APB bus and in case of certain modules they are connected to the same bus .Hence it depends upon the application which bus to use. As can be seen from the picture below the AHB1 takes clock to PORT A , PORT B , PORT C etc . Hence to initialize a pin to a particular port the in RCC AHB1 clock enable register GPIOEN is set to 1 (For Port A GPIOAEN , For Port B GPIOBEN etc) Enabling the clock to that port otherwise the particular pin will not be functional Creating an instance of the structure and then using the members of the structure set the following:- PIN – Takes the pin no as input GPIO_PIN_X {where X -0 to 15} MODE– Selects the mode the specified pin is supposed to work in . It takes in value Output Push Pull ,Output Open drain PULL- It selects the initial value of the pin and takes value no pull up no pull down, pull up or pull down SPEED- Selects the speed of the working of the specified pin i.e low, medium or high ALTERNATE- Specifies the alternate function performed by the pin UART TX OR RX , ADC etc, GPIO Peripheral SDK using STM32HAL We are going to use STM32 HAL SDK for using the GPIO peripheral of the STM32F103. STM32HAL is a very versatile and robust Software package for using Peripherals of the STM32 Microcontroller family. To know more about STM32HAL, refer to this link. Each STM32 HAL has drivers for all the peripherals of the STM32 Microcontroller(One can navigate to the Driver folder in the STM32F1 HAL local repo installed). These drivers can be configured and enabled to use in the project via the STM32 CubeMX configuration tool, which is also integrated into STM32CubeIDE( just like told in the above section for configuring GPIO peripherals). Will be digging into that part, in the next section. For now, let’s understand the STM32HAL GPIO SDK for STM32F103 MCU. stm32f1xx_hal_gpio.c: This file consists of various macros and is responsible for the intialization and configuration of the functions which in turn configures the peripheral. stm32f1xx_hal_gpio.h: consists of various structure definitions that help configure various parameters of the pin, enumeration, and various macros stm32f1xx_ll_gpio.c & stm32f1xx_ll_gpio.h: GPIO Low-level driver source/header file, contains functions that configure the GPIO Peripheral registers at the hardware level. These files are the ones that actually interact with the hardware and make it configurable to our needs.  STM32 HAL Functions for GPIO Peripheral Functions are set of instructions that required to perform certain tasks. In general, a function is first declared in header file(.h) and then it is definied in source file(.c) and then called in main.c or application code. It is of the form function return data type, function name and function arguments. In Embedded functions are required to initialize a peripheral or configure it on the basis of various parameters which are passed on using arguments. This information is then passed on to the registers. List of functions used
Clock Peripheral Theory Before getting into how to configure the clock peripheral . We will discuss why microcontrollers need a clock source at all. The processor , the busses and the peripherals that are present in the microcontroller all are reliant on the clock to synchronize their operations. The choice of the clock source depends upon the following factors:- How much speed is required for a particular application How accurate the clock source should be i.e the consistency of the period between each clock tick Power requirements of the application If there is any significant error in the clock speed it will cause unpredictable consequences for internal microcontroller operations.The operations such as:- The conversion rate of analog to digital signals is governed by a microcontroller clock . The clock determines the rate at which the analog signal will be sampled and how accurate that sampling is done is also governed by the accuracy of the clock. The digital to analog conversion in a microcontroller is also dependent on the clock as the clock speed determines the maximum frequency that can be generated for the analog signal. Also the clock accuracy determines the waveform accuracy In the case of asynchronous communication the sampling of the incoming data stream is clock dependent as well.Even though in some cases the synchronization of the clock is not necessary but the transmitter and receiver should have the same clock speed for decoding and encoding purposes. So in a nutshell the clock determines how fast a microprocessor executes the given set of instructions Clock Peipheral features in STM32F103 The main system clock of the microcontroller is the one from which all the other clocks are derived such as clock to AHB domain, clock to APB domain , clock to the USB, clock to the ethernet etc . This main system clock is referred to as the SYSCLK. As can be seen in the picture of the clock configuration setting the system clock after being chosen is passed through prescalers it gets divided into a clock source that goes into HCLK that goes into AHB bus , DMA , cortex system timer ,FCLK. PCLK1 that goes into APB1 peripherals and timer clocks .PCLK2 that goes into APB2 peripherals and timer clocks and ADC1. Hence it is responsible for operations such as DMA , ADC. These buses are further connected to the pins that are responsible for ADC , GPIO , SPI and other functionality and in case these pins are not being used the clocks to the pin can be disabled to save power FIG-1- Clock configuration in stm32cube To properly drive the SYSCLK there are 3 different sources:- HIGH SPEED INTERNAL (HSI) oscillator clock(Internal to MCU) HIGH SPEED EXTERNAL (HSE) oscillator clock(External to MCU) PHASE LOCKED LOOP(PLL) clock( Internal to MCU) There are secondary clock sources as well:- 40KHz low speed internal RC (LSI) this used to drive watchdog and optionally RTC(Internal to MCU) 32.768 KHz low speed external crystal (LSE) which drives the RTCclock (RTCCLK) the error involved the LSE is less compared to the LSI( External to MCU) By default the HSI is ON in the microcontroller whereas all the other clocks HSE, PLL etc are OFF. Each clock source can be switched ON or OFF independently when not in use to prevent unnecessary power consumption. HSI HSI is the default SYSCLK after startup from RESET state, wakeup from STOP OR STAND BY mode or failure of HSE. It is a low cost clock source having a start-up time less than HSE. The maximum frequency that can be generated is 8MHz using HSI. It suffers from the demerit that it is less accurate than external crystal oscillator or ceramic resonator Also as the temperature increases above 25 degree celsius the accuracy decreases HSE In case of high speed application HSE can be used as a clock source for SYSCLK . The HSE or the high speed external clock is an external clock that sometimes comes attached to the microcontroller itself or at times requires the usage of an external circuitry. HSE is faster and more accurate than HSI but suffers from demerits such as slower startup time, high power consumption and times usage of an external circuitry The maximum frequency that can be generated using HSE clock is 16MHz HSE has 3 states ON , OFF and BYPASS BYPASS is basically connecting wire to OSC_IN and putting the OSC_OUT in high impedance state i.e bypassing the crystal oscillator as can be seen in FIG-2 external source FIG-2 BYPASS mode in HSE PLL The PLL or phase locked loop is a clock system that is capable of providing the clock frequency much higher than that of HSI or HSE i.e in case of stm32f1 series it can go up to 72Mhz Hence for high speed applications PLL is a go to choice . Also peripherals such as USB, Ethernet PHY can not work using HSI or HSE. PLL provides the flexibility of choosing clock frequency without the help of an external oscillator. SYSTICK clock The SYSTICK is required to generate interrupts on a regular basis . It helps the OS in multitasking applications .In applications without an OS is used for timekeeping, time measurement or as an interrupt source. It is derived from the system clock in stm32 and has an usual value of 16MHz. Which means is to generate a delay of 1sec 16000000 has to be loaded on SysTick load value register Clock peripheral HDK in STM32F103 external oscillator pins MCO pins Clock peripheral SDK in STm32F103 Clock peipheral Files in STM32HAL: CLock peripheral low level files and HAL level files Fucntions descritption and structure decsritption Clock Peripheral HAL Functions HAL_RCC_OscConfig: return type HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) Parameter arguments explanation and return type explanantion Argument 1 Argument 2 argument 3 return type //Demo of how to use functions Clock Peripheral HAL Data Types Data type name( structure name): //Code of that structure Tab #1 Tab #2 Tab #1 Lorem ipsum dolor sit amet, consectetur
Table of Contents Many of you may be familiar with the RFID module MFRC522, but I’m willing to bet that most of you have only interfaced this module with an Arduino and the Arduino IDE environment. However, if you need to use the RFID module with other MCUs, you may find yourself at a loss for how to proceed. If this is the case, you’ve come to the right place. In this blog, I will show you how to create a device driver for the RFID Module MFRC522, allowing you to interface it with any Host MCU. If you’re not sure what we mean by interfacing with a Host MCU or why it’s necessary, be sure to check out our blog for more information. Continuing with the MFRC522 RFID reader interfacing to host MCU, Objective would be to interface this module with Host MCU’s like of NXP Semiconductors, STMicroelectronics or other vendors MCU’s. Will make the driver to interface the RFID Reader with any MCU, not unlike just with Arduino and Arduino IDE environment. You just need to change 2-3 low level API’s for running it on different MCU’s, would be telling about it in below sections. In this blog we are going to write the driver in c++ language. Before proceeding further would recommend viewers go through, the following set of blogs and videos to have a better understanding. Prerequite, better to have: Viewers can refer to this blog to know about RFID technology in detail. or can watch this video which is in animated format to know about RFID technology. RFID Reader MFRC522: Overview and Datasheet Explanation( Highly recommended to go through at first) MIFRAME RFID Tags: Overview and Datasheet Explanation About Serial Communication Protocols To know about What are Microcontrollers and introduction on them Hardware Connection of MFRC522 Reader module MFRC522 Module has 8 pins exposed out, which can be categorised into 3 parts: Communication pins, Power Supply Pins and Additional Pins. As explained below Communication Pins Power Supply Pins Additional Pins Logic Analyzer Communication Pins 4 pins are communication pins, that would be connected to Host MCU either using SPI, I2C, or UART. MFRC522 Communication Pins We would be making the connection using the SPI peripheral. Here I am referencing out hardware connection with 2 microcontrollers: NXP Semiconductors S32K144 MCU and STMicroelectronics STM32F103 MCU. STMicroelectronics STM32F103 would be using SPI-1 Instance and S32K144 would be using LPSPI-0 Instance.  Power Supply Pins 2 pins are for Power Supply Connection, which would be used for powering the RFID reader. One can power the MFRC522 Reader via Host MCU. Connect the VCC and GND pins with the Host MCU Power pins. Make sure, you supply MFRC522 with 3.3 V, don’t power it with 5V. MFRC522 Power supply connections Additional Pins There are 2 additional pins on MFRC522: IRQ and RST pins. IRQ pin is an interrupt pin, that is used for alerting the HOST MCU when an RFID tag is in the vicinity. Read about the IRQ pin and interrupts in MFRC522 from here. RST pin would be not used for this project. Logic Analyzer These connections are for debugging and understanding purposes. By connecting the logic analyzers, we would be able to see how literally SPI communication and what commands we are sending, and what responses we are getting in bit and byte levels. Would recommend doing this step, as it makes the understanding clear at the root level. It would hardly take a couple of minutes to setup this. For connecting the logic analyzer, connect the Channel1,3,5,7 of the logic analyzer with communication pins. I am using the Salae logic analyzer, which is readily available. viewers can refer to this video on Gettobyte Youtube channel on how to set up logic analyzer connections, hardware, and software. Logic Analyzer MFRC522 Functional Description API’s MFRC522 has a set of functional descriptions, on which the whole of the working of MFRC522 depends. To write the driver of MFRC522, it’s important to have an understanding of those functional blocks. Reading from the datasheet could be tiering, hence viewers can read and understand from here. MFRC522 Host Interfaces MFRC522 FIFO MFRC522 CRC MFRC522 Interrupts MFRC522 Time Unit MFRC522 Command Set MFRC522 Host Interfaces MFRC522 Host Interface API’s We are going to connect MFRC522 via the SPI interface to the host MCU. SPI configurations: MSB is sent first 8 Bits per transfer The clock is Low when inactive(CPOL=0) Data is valid on Clock Leading Edge(CPHA=0) Enable line is Active LOW SPI Address Byte These address bytes are of 6 bits. When sending the address byte, MSB should tell whether we have to perform a read/write operation on that address. LSB is always set to logic 0 when sending the address byte. Thus you would find in the below driver that MFRC522 registers which are defined in GB_MFRC522.h have been left shifted 1 bit so that the MSB bit can be configured whether to perform a Read or write operation on that register address. SPI Read Data To read the data, Host MCU will send the register address at the MOSI line with LSB as 1 and then in MISO, it would get the data. This would be performed via a low-level function, that is reading one single byte from the address GB_reg which is sent in its argument. uint8_t GB_MFRC522_ReadRegister(PCD_Register GB_reg); For e,g we have to read the version of the MFRC522, which can be done via VersionReg(ox37): uint8_t v = GB_MFRC522_ReadRegister(VersionReg); So it would be left shifted first: 0x37<<1 = 0x6E(So that can configure MSB for read and Write operation). And then as we want to perform a read operation at this register, so need to write MSB with 1. We will Or above value with 0x80( See definition of uint8_t GB_MFRC522_ReadRegister(PCD_Register GB_reg): 0x6E | 0x80 = 0xEE. As per the datasheet, reading this register would give either 0x92 or 0x91.(Refer the datasheet for in-depth-description of this register). In logic analyzer reading from the MFRC522 would look like this: MFRC522 version
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