MFRC522 Host Interface API’s

We are going to connect MFRC522 via the SPI interface to the host MCU.

SPI configurations:

• MSB is sent first
• 8 Bits per transfer
• The clock is Low when inactive(CPOL=0)
• Data is valid on Clock Leading Edge(CPHA=0)
• Enable line is Active LOW

SPI Address Byte

These address bytes are of 6 bits. When sending the address byte, MSB should tell whether we have to perform a read/write operation on that address. LSB is always set to logic 0 when sending the address byte.

Thus you would find in the below driver that MFRC522 registers which are defined in GB_MFRC522.h have been left shifted 1 bit so that the MSB bit can be configured whether to perform a Read or write operation on that register address.

SPI Read Data

To read the data, Host MCU will send the register address at the MOSI line with LSB as 1 and then in MISO, it would get the data.

This would be performed via a low-level function, that is reading one single byte from the address GB_reg which is sent in its argument.

uint8_t GB_MFRC522_ReadRegister(PCD_Register GB_reg);

For e,g we have to read the version of the MFRC522, which can be done via VersionReg(ox37): uint8_t v = GB_MFRC522_ReadRegister(VersionReg);

• So it would be left shifted first: 0x37<<1 = 0x6E(So that can configure MSB for read and Write operation).
• And then as we want to perform a read operation at this register, so need to write MSB with 1. We will Or above value with 0x80( See definition of uint8_t GB_MFRC522_ReadRegister(PCD_Register GB_reg): 0x6E | 0x80 = 0xEE.

As per the datasheet, reading this register would give either 0x92 or 0x91.(Refer the datasheet for in-depth-description of this register). In logic analyzer reading from the  MFRC522 would look like this:

SPI Write Data

To write the data, Host MCU will send the register address at the MOSI line with LSB as 0 and then will write bytes that have to be written at that address register.

This would be performed via a low-level function, that is writing one single byte value at the address GB_reg .

void GB_MFRC522_WriteRegister(PCD_Register GB_reg, uint8_t value)

For e.g, we have to write data on the CommandReg register(0x02), which is used to specify which command MFRC522 has to send to PICC(refer to MFRC522 Command set of previous blog): GB_MFRC522_WriteRegister(CommandReg, command);

• So it would be left shifted first: 0x02<<1 = 0x12(So that can configure MSB for read and Write operation).
• And then as we want to perform a write operation at this register, so need to write MSB with 0. That would be done by default. We are sending a Transcive command(0b1100/0xC)

In the logic analyzer writing on MFRC522 would look like this

MFRC522 FIFO API’s

MFRC522 has an Internal FIFO of 64 bytes. Broadly FIFO of MFRC522 can be controlled via 3 registers: FIFODataReg(0x09), FIFOLevelReg(0x0A), and WaterLevelReg(0x0B). These registers would be read and written directly using the Low-Level Host Interface API.

1. FIFODataReg(0x09): Accessing this register, we can write or read data on the FIFO buffer.

• GB_MFRC522_WriteRegister(FIFODataReg, sendLen, sendData); 

0x09 is left shifted by 1 byte, which becomes 0x12. Thus you can see below pic 0x12 is transmitted from the MOSI line and then in FIFO we are writing just 1 byte which is the REQA command(0x26)

• GB_MFRC522_ReadRegister(FIFODataReg, n, backdata, rxalign);

0x09 is left shifted by 1 byte, which becomes 0x012. And then further we OR it with Ox80 to read the FIFO buffer, which becomes 0x12 | 0x80 = 0x92. Thus you can see below pic HOST MCU is transmitting 0x92 and in return, it reads the FIFO buffer, which is basically ATQA( response of REQA which is transmitted above)

2. FIFOLevelReg(0x0A): Accessing this register, we can read how many bytes are there on the FIFO buffer.(0x0A<<1 ) | 0x80 = 0x94.

Reading the number of bytes received in FIFO after the REQA command is sent. Would be getting 2 bytes in FIFO. Hence on transmitting 0x94 on MOSI, we would be getting 0x02 at MISO.

MFRC522 CRC API’s

• gb_MFRC522_statusCodes PCD_CalculateCRC( byte *data, byte length, byte *result): Is the API that would be used for the calculation of CRC.( API defination see below driver source file)
• For using the CRC we have to configure its preset value. That can be done via the ModeReg register. In the ModeReg register, bits CRCPreset[1:0] are used for configuring the Preset value.

GB_MFRC522_WriteRegister(ModeReg, 0x3D); // Default 0x3F. Set the preset value for the CRC co processor for the CalcCRC command to 0x6363 (ISO 14443-3 part 6.2.4) 

We would be setting the preset to 6363h. Thus would be setting the CRCPreset bits to 01.

gb_MFRC522_statusCodes PCD_CalculateCRC( byte *data, byte length, byte *result): Is the API that would be used for calculation of CRC

MFRC522 Interrupts API’s

MFRC522 can trigger the interrupts when a certain event occurs. There are 4 registers for configuring the interrupts of MFRC522: ComIrqReg(0x04) & DivIrqReg(0x03) for indicating which interrupt has been triggered. ComIEnReg (0x02) & DivIEnReg(0x03) for configuring the behavior of the IRQ pin. These registers would be read and written directly using the Low-Level Host Interface API.

MFRC522 Time Unit API’s

MFRC522 has a Timer Unit, that is used for configuring the internal clock and analog interface. The timer unit has the following registers: TModeReg(0x2A), TPrescalerReg(0x2B),TReloadReg(0x2C and 0x2D) and TCounterVAlReg(0x2E & 0x2F). These registers would be directly written and read by Low-Level Host Interface API.

• GB_MFRC522_WriteRegister(TModeReg, 0x80); // TAuto=1; timer starts automatically at the end of the transmission in all communication modes at all speeds
• GB_MFRC522_WriteRegister(TPrescalerReg, 0xA9); // TPreScaler = TModeReg[3..0]:TPrescalerReg, ie 0x0A9 = 169 => f_timer=40kHz, ie a timer period of 25μs.
• GB_MFRC522_WriteRegister(TReloadRegH, 0x03); // Reload timer with 0x3E8 = 1000, ie 25ms before timeout.
• GB_MFRC522_WriteRegister(TReloadRegL, 0xE8);

MFRC522 Command Set API’s

MFRC522 operation is determined by certain commands. According to these commands, correspondingly MFRC522 would be performing some action. Host MCU will write the command code to the CommandReg Register(0x01). This Register would be read and written directly using the Low-Level Host Interface API.

Following is the table of the commands, that can be sent.

So say, we have to send Idle Command to MFRC522.

• GB_MFRC522_WriteRegister(CommandReg, PCD_Idle);

  

• GB_MFRC522_WriteRegister(CommandReg, PCD_Transceive);

  

• GB_MFRC522_WriteRegister(CommandReg, PCD_CalcCRC);