Table of Contents
Communication Protocols in Embedded System
Serial communication
In serial communication, we have only one line for transmitting and receiving data which is why it is half-duplex. It is best for high frequencies as it uses only a single bus or channel for communication, but it can be a bit slower than parallel as it sends only a single bit per clock pulse also because of the single wire here we have fewer chances of cross-talks. It can detect the error as well.
When transferring a bit quick change in voltage are required like for 5v OS, 0 bit communicated as a short pulse is 0v, and 1 bit communicated by a short pulse of 5v. In serial communication, the first bit is the most significant bit and the last one is the least significant bit.
Parallel Communication
In parallel communication, we have a number of lines or buses equal to the number of bits we are transferring. We call it full duplex as the line for transmitting and receiving bits is different. It is faster for small frequencies as all bits are sent at once but as we have to use multiple wires it is costlier also here, we have lots of chances of cross-talks.
As in serial, here also we have the first bit is the most significant bit and the last one is the least significant bit.
How do they convert?
The protocols we have read above communicate in serial form, but they get the data from their peripheral device in parallel form. How do bits get converted into serial form to parallel form? Suppose we have 4 bits, to convert them from parallel to serial we need a Parallel to Serial converter, In the same way, if we want to convert parallel from series, we need a serial to parallel converter. Here comes the D Flip-Flop which is specially designed for such conversions.
What is Flip-Flop?
A basic memory element or basic digital memory circuit is known as Flip-Flop. It is some medium in which one bit of information (1 or 0) can be stored or retained until it\’s necessary.
- As one flip-flop can store one bit of information. To store multiple bits, we need multiple flip-flops.
- The group of flip-flops, which are used to store the binary data is known as register.
Flip flop circuits are classified into four types based on their use:
- D-Flip Flop
- T- Flip Flop
- SR- Flip Flop
- JK- Flip Flop.
Here for conversion between Serial and parallel bits of data D-Flip Flop is used.
Now, what is D Flip-Flop?
D flip-flop is also known as Data or Delay Flip-Flop. It has a single D input and a clock input C which is why we call it a D flip-flop. Or for the word delay, it describes what happens to the data at input 0. The data at D input is delayed by one clock pulse before it gets to the output Q.
There are two different ways of conversions:
- Parallel to Serial conversion.
- First, we need Flip-Flops equivalent to the number of bits. Then we will put the multiplexer in between the Flip-Flop.
Multiplexer- It is a combinational circuit that takes input from one of many input lines(parallel) and directs it to a single output line(serial).
It has two inputs:
1) From the previous Flip-Flop
2) From Parallel bit data.
Now we will load the data which will be transferred one by one.Here msb will be transferred first.
- Serial to Parallel conversion.
- First, we need Flip-Flops equivalent to the number of bits. This time we won\’t put the multiplexer in between the Flip-Flop.
- We need to store all the bits at first for this we will pull the clock signal low. Once all bits are loaded, we will pull the clock signal high, and it will shift the LSB to the input of Flip-Flop 1 and output of Flip-Flop 0. Same way all bits gets transferred.
- Now all the bits are stored in these Flip-Flop and as shown above all the Flip-Flop will transfer the bits at once the way it happens in parallel..
Overview about Serial Communication Protocols in MCU
UART Protocol
What is UART Protocol?
UART stands for Universal Asynchronous Receiver/Transmitter. As we can understand by the name it says it receives and transmits asynchronously. Asynchronously means it doesn\’t use clock pulse to synchronize the transmitter and the receiver.
In UART, the transmitter takes the signals in parallel from a controlling device[ex-CPU] then it sends the bits to a receiver in serial then the receiver converts those bits in parallel again. UART follows one master one slave approach as it uses only 2 wires for communication. It has one transmitter and one receiver.
How does it work?
As I, ve mentioned above it transmits asynchronously hence it uses a start and stops a bit, in it contains main data and a parity bit. The parity bit is only needed if the device needs to check the error.
When the device wants to start the communication, it pulls the transmitting line low which means it sends a 0 bit and receiving device understands that the transmitter wants to send the data. When the transmission line goes lows it stays low for one clock pulse and then it starts sending the data of 8 bits then the 9th one is a parity bit, the last one is stopping bit it stays high for the one clock pulse until the transmitter sends a low bit to start another frame.
To get, in detail understanding on UART Protocol, refer to this blog.
SPI Protocol
What SPI Protocol is?
SPI stands for Serial Peripheral Interface. Just like UART it also uses Serial Communication for transmitting and receiving data but instead of asynchronous it uses synchronous communication protocol for transmission.
Synchronous means the transmitter and the receiver must have the same clock signal. It uses a Full duplex communication protocol which means it can send and receive at the same time. SPI follows one Master multiple slave configuration.
This protocol has 4 parts
1. MOSI-Master Out Slave In
Here Master sends data to the slave and the slave receives the data. Master sends data to each device it is connected to via a single wire.
2. MISO-Master In slave out
Here Slave sends the data to the master and the master receives the Data. Master receives the data from each device it is connected to through a single wire.
3. CLK-Clock Signal
It is important for synchronizing the data when the master sends or receives it.
4. CS/SS-Chip select/slave select
We have different wires connected to the chips. Suppose we have 3 chips connected. Then the master would have three wires cs1,cs2,cs3 connected from chip1, chip2,chip3 individually.
To get in detail understanding on SPI Protocol, refer this blog.
I2C Protocol
I2C stands for the inter-integrated circuit. If you have read carefully about SPI and UART you will find I2C got the best features of these two.
It follows multi-master protocol as multiple masters through a single slave or to multiple slaves. It is a half-duplex communication protocol since it has only one line for transferring and receiving data. It is also called Two Wired Interface as it uses two wires for communication.
This protocol has 2 parts
- SDA: For sending bits
- SCL: For synchronizing the data.
How does it work?
In I2C as we have multiple slaves, every slave must have a different address before sending a bit master will address or call the receiver. If we have multiple masters then the master will check the clock signal. If it is high it will send the data or if it is low then it means another master is sending the data at the moment.
To get more in detail understanding of I2C protocol, refer to this blog.
Conclusion Para
- In the end, if you want to use two devices then UART works best and fastest.
- If you have multiple slaves and one master then I would suggest going for SPI
- And if you want to connect one slave with multiple masters then I2C is the fastest as it lowers the wirings as well.
Other blogs to explore
About Microcontrollers
About IoT
GPIO Peripheral in STM32F103 MCU
Table of Contents GPIO Theory So now we’ll talk about GPIO pins . GPIO stands for general purpose input output pins; they are the means for communication between the microcontroller and the external world (using sensors etc).It is signal that arrives on these pins or a signal that is sent or written on these pins that facilitates this communication. These pins can be configured to act as input or output via the application software(in our case stm32cube ide). The programmer can configure the pins as LOW or 0V or HIGH or 3.3V(or 5V ). These GPIO pins can also be configured to act as special purpose pins as well where their alternate functionality is exploited . These alternate functionality includes UART , ADC , SPI etc . In the case of UART communication, Transmitter(Tx) and Receiver(Rx) pins are required. GPIO pins can be configured to act as TX or RX pins . Even in ADC the pins are configured to act as Analog pins having 12 bits of resolution . The alternate functions of various pins are shown below: Input floating Input pull-up Input pull-down Analog Output open-drain Output push-pull Alternate function push-pull Alternate function open-drain GPIO Peripheral in STM32F103 All the pins of STM32F103 are grouped in multiple ports as PORT A, PORT B, PORT C As can be seen from Pin configuration chart in the PA1 stands for Port A Pin 1. There are 37 GPIO pins in stm32f103 which are divided as PORT A with 16 pins, PORT B with 16 pins, PORT C with 3 pins and PORT D with 2 pins. Each GPIO port has two 32-bit configuration registers (GPIOx_CRL, GPIOx_CRH), two 32-bit data registers (GPIOx_IDR, GPIOx_ODR), a 32-bit set/reset register (GPIOx_BSRR), a 16-bit reset register (GPIOx_BRR) and a 32-bit locking register (GPIOx_LCKR). In the register names, x stands for the port to which pin belongs. If we are configuring pin PA1, it has Port A then registers would be accessed by GPIOA_CRL and etc. Out of above-mentioned registers, GPIO peripheral has 2 most important registers: Direction Register(GPIOx_CRL, GPIOx_CRH)</h3 > Direction register: Set the corresponding pin as input/output pin. Data register(GPIOx_IDR, GPIOx_ODR)</h3 > Data register: where we set the Logic level (High (1)/Low (0)), for the corresponding pin if it is configured as output pin or we read the Logic level (High (1)/Low (0)), for the corresponding pin if it is configured as input pin. Pin Configuration Chart Pin Definitions GPIO Peripheral Block Diagram in STM32F103 First after selecting the pin the port is decided Then after following the arrow the busses are selected based on it: APB/APB1 or AHB After which the clock is enabled to the particular port using either __HAL_RCC_GPIOX_CLK_ENABLE() function or using the RCC AHB1 peripheral clock enable register and selecting the port to which clock has to be provided by enabling it. Methods to configure the GPIO Peripheral Configuring the busses i.e AHB1, AHB2, APB1, APB2 . The AHB bus is faster than APB bus and in case of certain modules they are connected to the same bus .Hence it depends upon the application which bus to use. As can be seen from the picture below the AHB1 takes clock to PORT A , PORT B , PORT C etc . Hence to initialize a pin to a particular port the in RCC AHB1 clock enable register GPIOEN is set to 1 (For Port A GPIOAEN , For Port B GPIOBEN etc) Enabling the clock to that port otherwise the particular pin will not be functional Creating an instance of the structure and then using the members of the structure set the following:- PIN – Takes the pin no as input GPIO_PIN_X {where X -0 to 15} MODE– Selects the mode the specified pin is supposed to work in . It takes in value Output Push Pull ,Output Open drain PULL- It selects the initial value of the pin and takes value no pull up no pull down, pull up or pull down SPEED- Selects the speed of the working of the specified pin i.e low, medium or high ALTERNATE- Specifies the alternate function performed by the pin UART TX OR RX , ADC etc, GPIO Peripheral SDK using STM32HAL We are going to use STM32 HAL SDK for using the GPIO peripheral of the STM32F103. STM32HAL is a very versatile and robust Software package for using Peripherals of the STM32 Microcontroller family. To know more about STM32HAL, refer to this link. Each STM32 HAL has drivers for all the peripherals of the STM32 Microcontroller(One can navigate to the Driver folder in the STM32F1 HAL local repo installed). These drivers can be configured and enabled to use in the project via the STM32 CubeMX configuration tool, which is also integrated into STM32CubeIDE( just like told in the above section for configuring GPIO peripherals). Will be digging into that part, in the next section. For now, let’s understand the STM32HAL GPIO SDK for STM32F103 MCU. stm32f1xx_hal_gpio.c: This file consists of various macros and is responsible for the intialization and configuration of the functions which in turn configures the peripheral. stm32f1xx_hal_gpio.h: consists of various structure definitions that help configure various parameters of the pin, enumeration, and various macros stm32f1xx_ll_gpio.c & stm32f1xx_ll_gpio.h: GPIO Low-level driver source/header file, contains functions that configure the GPIO Peripheral registers at the hardware level. These files are the ones that actually interact with the hardware and make it configurable to our needs.  STM32 HAL Functions for GPIO Peripheral Functions are set of instructions that required to perform certain tasks. In general, a function is first declared in header file(.h) and then it is definied in source file(.c) and then called in main.c or application code. It is of the form function return data type, function name and function arguments. In Embedded functions are required to initialize a peripheral or configure it on the basis of various parameters which are passed on using arguments. This information is then passed on to the registers. List of functions used
I2C Peripheral in S32K144
I2C Peripheral in S32K1 Microcontroller. How to use I2C peripheral of S32K1 Microcontrollers
ElecronicsV3 Automotive Board: Arduino of Automotive world || Why to get started with it and how?
Author: Kunal Gupta
Communication Protocol\’s in Embedded:
Table of Contents Communication Protocols in Embedded System Serial communication In serial communication, we have only one line for transmitting and receiving data which is why it is half-duplex. It is best for high frequencies as it uses only a single bus or channel for communication, but it can be a bit slower than parallel as it sends only a single bit per clock pulse also because of the single wire here we have fewer chances of cross-talks. It can detect the error as well. When transferring a bit quick change in voltage are required like for 5v OS, 0 bit communicated as a short pulse is 0v, and 1 bit communicated by a short pulse of 5v. In serial communication, the first bit is the most significant bit and the last one is the least significant bit. Parallel Communication In parallel communication, we have a number of lines or buses equal to the number of bits we are transferring. We call it full duplex as the line for transmitting and receiving bits is different. It is faster for small frequencies as all bits are sent at once but as we have to use multiple wires it is costlier also here, we have lots of chances of cross-talks. As in serial, here also we have the first bit is the most significant bit and the last one is the least significant bit. How do they convert? The protocols we have read above communicate in serial form, but they get the data from their peripheral device in parallel form. How do bits get converted into serial form to parallel form? Suppose we have 4 bits, to convert them from parallel to serial we need a Parallel to Serial converter, In the same way, if we want to convert parallel from series, we need a serial to parallel converter. Here comes the D Flip-Flop which is specially designed for such conversions. What is Flip-Flop? A basic memory element or basic digital memory circuit is known as Flip-Flop. It is some medium in which one bit of information (1 or 0) can be stored or retained until it’s necessary. As one flip-flop can store one bit of information. To store multiple bits, we need multiple flip-flops. The group of flip-flops, which are used to store the binary data is known as register. Flip flop circuits are classified into four types based on their use: D-Flip Flop T- Flip Flop SR- Flip Flop JK- Flip Flop. Here for conversion between Serial and parallel bits of data D-Flip Flop is used. Now, what is D Flip-Flop? D flip-flop is also known as Data or Delay Flip-Flop. It has a single D input and a clock input C which is why we call it a D flip-flop. Or for the word delay, it describes what happens to the data at input 0. The data at D input is delayed by one clock pulse before it gets to the output Q. There are two different ways of conversions: Parallel to Serial conversion. First, we need Flip-Flops equivalent to the number of bits. Then we will put the multiplexer in between the Flip-Flop. Multiplexer- It is a combinational circuit that takes input from one of many input lines(parallel) and directs it to a single output line(serial). It has two inputs: 1) From the previous Flip-Flop 2) From Parallel bit data. Now we will load the data which will be transferred one by one.Here msb will be transferred first. Serial to Parallel conversion. First, we need Flip-Flops equivalent to the number of bits. This time we won’t put the multiplexer in between the Flip-Flop. We need to store all the bits at first for this we will pull the clock signal low. Once all bits are loaded, we will pull the clock signal high, and it will shift the LSB to the input of Flip-Flop 1 and output of Flip-Flop 0. Same way all bits gets transferred. Now all the bits are stored in these Flip-Flop and as shown above all the Flip-Flop will transfer the bits at once the way it happens in parallel.. Overview about Serial Communication Protocols in MCU UART Protocol What is UART Protocol? UART stands for Universal Asynchronous Receiver/Transmitter. As we can understand by the name it says it receives and transmits asynchronously. Asynchronously means it doesn’t use clock pulse to synchronize the transmitter and the receiver. In UART, the transmitter takes the signals in parallel from a controlling device[ex-CPU] then it sends the bits to a receiver in serial then the receiver converts those bits in parallel again. UART follows one master one slave approach as it uses only 2 wires for communication. It has one transmitter and one receiver. How does it work? As I, ve mentioned above it transmits asynchronously hence it uses a start and stops a bit, in it contains main data and a parity bit. The parity bit is only needed if the device needs to check the error. When the device wants to start the communication, it pulls the transmitting line low which means it sends a 0 bit and receiving device understands that the transmitter wants to send the data. When the transmission line goes lows it stays low for one clock pulse and then it starts sending the data of 8 bits then the 9th one is a parity bit, the last one is stopping bit it stays high for the one clock pulse until the transmitter sends a low bit to start another frame. To get, in detail understanding on UART Protocol, refer to this blog. SPI Protocol What SPI Protocol is? SPI stands for Serial Peripheral Interface. Just like UART it also uses Serial Communication for transmitting and receiving data but instead of asynchronous it uses synchronous communication protocol for transmission. Synchronous means the transmitter and the receiver must have the same clock signal. It uses a Full duplex communication protocol which means it can send and receive at the same time. SPI
Introduction to STM32WB55
Table of Contents About STMicroelectronics STMicroelectronics is a leading provider of semiconductor solutions that are seamlessly integrated into billions of electronic devices used by people worldwide on a daily basis. The semiconductor company builds products, solutions, and ecosystems that enable smarter mobility, more efficient power and energy management, and the wide-scale deployment of the Internet of Things and connectivity technologies. To know more about STMicroelectronics refer to its website: www.st.com. Going back in history, ST was formed in 1987 by the merger of two government-owned semiconductor companies: Italian SGS Microelettronica (where SGS stands for Società Generale Semiconduttori, “Semiconductors’ General Company”), and French Thomson Semiconductors, the semiconductor arm of Thomson. In this blog, we are going to start with ST IoT-based Nucleo Board STm32WB55. What is STM32WB Series all about? The STM32WB55xx and STM32WB35xx are advanced multiprotocol wireless devices that boast ultra-low-power consumption. These devices are equipped with a powerful and efficient radio that is compliant with the Bluetooth® Low Energy SIG specification 5 and IEEE 802.15.4-2011 (Zigbee). Additionally, they feature a dedicated Arm® Cortex®-M0+ processor that handles all real-time low-layer operations. These cutting-edge devices are perfect for a wide range of applications that require reliable and efficient wireless communication. Whether you’re working on a smart home project, a wearable device, or an industrial automation system, the STM32WB55xx and STM32WB35xx are the ideal choices. With their advanced features and capabilities, these devices are sure to revolutionize the way we think about wireless communication. So why wait? Start exploring the possibilities today and discover what the STM32WB55xx and STM32WB35xx can do for you! The devices have been meticulously crafted to operate on minimal power and are built around the high-performance Arm® Cortex®-M4 32-bit RISC core, which can operate at a frequency of up to 64 MHz. This core boasts a Floating-point unit (FPU) single precision that supports all Arm® single-precision data-processing instructions and data types. Additionally, it is equipped with a full set of DSP instructions and a memory protection unit (MPU) that enhances application security. These devices have been designed with the utmost care and attention to detail, ensuring that they are not only efficient but also highly effective. The Arm® Cortex®-M4 32-bit RISC core is a powerful tool that enables these devices to perform at an exceptional level, while the FPU single precision and DSP instructions provide unparalleled accuracy and precision. Furthermore, the memory protection unit (MPU) ensures that your applications are secure and protected from any potential threats. Enhanced inter-processor communication is provided by the IPCC with six bidirectional channels. The HSEM provides hardware semaphores used to share common resources between the two processors. The devices embed high-speed memories (up to 1 Mbyte of flash memory for STM32WB55xx, up to 512 Kbytes for STM32WB35xx, up to 256 Kbytes of SRAM for STM32WB55xx, 96 Kbytes for STM32WB35xx), a Quad-SPI flash memory interface (available on all packages) and an extensive range of enhanced I/Os and peripherals.  About STM32WB55 Architecture Memories Security and Safety True random number generator (RNG) RF Subsystem Low Power Modes Clocks and Startup General Purpose Input Output(GPIOs) Direct Memory Access (DMA) Interrupts and Events Analog to Digital Convertor (ADC) Comparators (COMP) Touch Sensing Controller Liquid crystal display controller (LCD) Timers and watchdogs Real-time clock (RTC) and backup registers Inter Integrated Circuit (I2C) Universal Synchronous/Asynchronous Receiver Transmitter (USART) Serial Peripheral Interface(SPI) Serial audio interfaces (SAI) Quad-SPI memory interface (QUADSPI) Architecture Architecture STM32WB55 Architecture The host application is housed on an Arm® Cortex®-M4 CPU (named CPU1) that connects with a generic microcontroller subsystem. The RF subsystem is made up of a specialized Arm® Cortex®-M0+ microprocessor (named CPU2), Bluetooth Low Energy and 802.15.4 digital MAC blocks, an RF analog front end, and proprietary peripherals. All Bluetooth Low Energy and 802.15.4 low-layer stack functions are handled by the RF subsystem, which limits communication with the CPU1 to high-level exchanges. Some functions are shared between the RF subsystem CPU (CPU2) and the Host CPU (CPU1): Flash memories SRAM1, SRAM2a, and SRAM2b (SRAM2a can be retained in Standby mode) Security peripherals (RNG, AES1, PKA) Clock RCC Power control (PWR) Memories Memories STM32WB55 Memories 2.1. Adaptive real-time memory accelerator (ART Accelerator) The ART Accelerator is a memory accelerator optimized for STM32 industry-standard Arm® Cortex®-M4 processors. It balances the inherent performance advantage of the Arm® Cortex®-M4 over flash memory technologies. To release the processor near 80 DMIPS performance at 64 MHz, the accelerator implements an instruction prefetch queue and branch cache, which increases program execution speed from the 64-bit flash memory. Based on CoreMark benchmark, the performance achieved thanks to the ART accelerator is equivalent to 0 wait state program execution from flash memory at a CPU frequency up to 64 MHz. 2.2. Memory protection unit In order to prevent one task from unintentionally corrupting the memory or resources used by any other active task, the memory protection unit (MPU) is used to manage the CPU1’s accesses to memory. This memory area is organized into up to eight protected areas. The MPU is especially helpful for applications where some critical or certified code must be protected against the misbehavior of other tasks. It is usually managed by an RTOS (real-time operating system). 2.3. Embedded flash memory The STM32WB55xx and STM32WB35xx devices feature, respectively, up to 1 Mbyte and 512 Kbytes of embedded flash memory available for storing programs and data, as well as some customer keys. 2.4. Embedded SRAM The STM32WB55xx devices feature up to 256 Kbytes of embedded SRAM, split in three blocks: SRAM1: up to 192 Kbytes mapped at address 0x2000 0000 SRAM2a: 32 Kbytes located at address 0x2003 0000 also mirrored at 0x1000 0000, with hardware parity check (this SRAM can be retained in Standby mode) SRAM2b: 32 Kbytes located at address 0x2003 8000 (contiguous with SRAM2a) and mirrored at 0x1000 8000 with hardware parity check. Security and Safety Security and Safety The STM32WB55xx contain many security blocks both for the Bluetooth Low Energy or IEEE 802.15.4 and the Host application. It includes: Customer storage of the Bluetooth Low Energy and
FlexTimer peripheral of NXP S32K1xx MCU( S32K144 MCU and ElecronicsV3 Board)
Learn how to use FlexTIMER peripheral of Automotive MCU S32K1xx using ElecronicsV3 Board (S32K144 MCU) by understanding FlexTIMER peripheral.
Author: Kunal Gupta
