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SPI Peripheral in S32K144 MCU

So hello guys, welcome back to NXP Semiconductors S32K144 MCU Tutorial series. In the last 2 blogs we had started with S32K144 MCU GPIO Peripheral & UART Peripheral .

In this blog we are going to explore the SPI Peripheral. Going to Start with SPI peripheral. Objective would be to get.

  • familiarity with SPI peripheral for S32K144 MCU.
  • Would be understanding SPI peripheral from Hardware point of view in S32K144 MCU.
  • Going to understand then how to use SPI peripheral via S32K SDK/lpspi driver.
  • Would also be demonstrating the spi_echo_pall sketch.

So read along the blog and do tell me its reviews

SPI Peripheral Theory

Serial Peripjeral interface is a synchronous serial communication interface used in embedded systems, typically to perform short distance communications between microcontrollers and device. Typical applications include interfacing to LCD displays, memory cards, Secure Digital cards and etc.

 

SPI Peripheral in S32K144 MCU

In S32K144 MCU, SPI protocol can be used via 2 peripherals: LPSPI & FlexIO.

SPI protocol in S32K144

LPSPI is referred as Low Power Serial Peripheral Interface. LPSPI is on chip peripheral only to do SPI communication protocol. SPI is a serial protocol which is done via SPI supported peripherals in the Microcontrollers.

Also, in S32K144 there is FlexIO peripheral through which on-board serial communication protocols like UART, I2C & SPI can be emulated. So through FlexIO peripheral, also SPI peripheral can be implemented. To know about FlexIO peripheral in S32K144, refer to this blog.

Features of SPI via LPSPI peripheral in S32K144 MCU:

  • LPSPI module supports efficient interface to an SPI bus, as a master and slave.
  • LPSPI is designed to use little CPU overhead, with DMA support. LPSPI can generate a DMA request.
  • SPI devices communicate in full duplex mode using a master-slave scheme, with a single master at a time. 
  • Single master can control multiple slave devices using individual slave select (SS) lines.
  • If MCU is configured as Master, then it will generate the frame for reading and wiriting and SPI clock which is synchronous.
  • Supports daisychain for controlling multiple slave sharing the same chip select.
  • Configurable clock polarity and clock phase
  • Master operation supporting upto 4 peripheral chip selects at a time
  • Transmit and receive FIFO of 4 words for both master and slave device.
  • Flexible timing parameters in master mode, including SCK frequency and delays between PCS and SCK edges.
  • Support for Full duplex transfers, supporting 1 bit transfers and receive on each clock edge.
  • Support for full-duplex transfers, supporting 1-bit/2-bit/4-bit transfers and receive on each clock edge.

How to get started with I2C peripheral in S32K144 MCU

SPI Hardware Pinout in S32K144 MCU

LPSPI Pinout and Hardware Instances

LPSPI peripheral in S32K144 has 3 instances: LPSPI0, LPSPI1, LPSPI2.

LPSPI Instances in S32K144 MCU

In S32K MCU, LPSPI peripheral can be used in serial and parallel data transfers. For this blog we are going to focus on serial data transfers. to know about parallel data transfers, refer to this blog.

All the LPSPI instances has following pins, for using them.

  • SCK (Serial clock): This pin is used to generate the clock pulses in SPI communication by the Master.
  • SOUT (Serial data out): This pin is MOSI pin.
  • SIN (Serial Data Input): This pin is MISO pin.
  • PCS [0] (Peripheral Chip Select 0): This pin is used to select the slave in SPI communication. Master device will generate a Low Signal on this Pin to select the Slave. And generate High signal to deselect the Slave.
  • PCS [1]: Peripheral Chip select 1.
  • PCS [2]: Peripheral Chip Select 2.
  • PCS [3]:Peripheral Chip Select 3
    S32K144 SPI Pins

     

Each LPSPI instance in S32K144 supports all the above-mentioned pins, with below mentioned pin details. Refer to this blog to know about pins signal description in S32K144 MCU

 

How to do LPSPI Pin Configuration

In a MCU a single pin can work as multiple function, so we have to configure that which function we need, accordingly pins have to be configured. This configuration of Alternate functions of pins in S32K144 MCU is done by Signal Multiplexing peripheral. One can configure which pin to use for LPI2C, via Signal Multiplexing peripheral, in which there is a register Pin Control Register (PCR) which has Pin Mux Control bits(MUX) for configuring the alternate functions of the pins.

PCR register of S32K144

For example, we are using LPISPI0. Now in LPISPI0 for using LPSPI0_PCS0, LPSPI0_SCK, LPSPI0_SOUT, LPSPI0_SIN pins one can configure PTB0, PTB2, PTB4, PTE1  pins:

  • You can see SSS column in the excel in that for PTB0 under LPSPI0_PCS has value of 0000_0011. Last 3 bits of this value represents the MUX values to be configured for configuring PTB0 pin as LPSPI0_PCS pin, in PORT_PCRn register.
  • You can see SSS column in the excel in that for PTB2 under LPSPI0_SCK has value of 0000_0011. Last 3 bits of this value represents the MUX values to be configured for configuring PTB2 pin as LPSPI0_SCK pin, in PORT_PCRn register.
  • You can see SSS column in the excel in that for PTB4 under LPSPI0_SOUT has value of 0000_0011. Last 3 bits of this value represents the MUX values to be configured for configuring PTB4 pin as LPSPI0_SOUT pin, in PORT_PCRn register.
  • You can see SSS column in the excel in that for PTE1 under LPSPI0_SCK has value of 0000_0010. Last 3 bits of this value represents the MUX values to be configured for configuring PTE1 pin as LPSPI0_SIN pin, in PORT_PCRn register.

This part of LPSPI pins configuration is done internally by S32 SDK/pin driver (Its detail overview is in GPIO Peripheral in S32K144 MCU). When writing the code, we just need to configure the structure  g_pin_InitConfig in which. mux member for the corresponding MCU pin will be assigned value according to last 3 bits of SSS column, as shown below and pass that structure in PINS_DRV_Init().

At line 12, 25, 38, 51 you see .mux is assigned with PORT_MUX_ALT_3 & PORT_MUX_ALT_2. The value of this is taken from port_mux_t Enum which is defined in pins_driver.h file as follows. The members defined in this Enum is according to the MUX bits values defined in PCRn register. So according to the value of the last 3 bits of SSS column, we will configure the. mux member of  g_pin_InitConfig structure

SPI SDK in S32K144 MCU

LPSPI SDK

S32K SDK/drivers provide an easy to use and quick way to use the LPI2C peripheral in S32K144, which is known as LPSPI SDK.

LPSPI SDK for S32K144 MCU

Each S32 SDK driver can be configured and enabled to use in the project via S32 Configuration Tool. Will be digging into that part, in next section. For now, let’s understand the LPSPI SDK in some detail, so as to use SPI peripheral via LPSPI.

LPSPI SDK files

n the SDK of LPSPI there are header and source files for LPSPI Driver and LPSPI Interrupt

  • LPSPI interrupt files contains functions for using &configuring of LPSPI interrupts and some common functions that has to be used by both master and slave
  • LPSPI driver files contains functions for using/configuration of LPSPI Peripheral.

LPSPI Driver

 LPI2C driver files are further divided into LPI2C Peripheral Abstraction Layer(PAL) & LPI2C Low Level drivers, as shown below:

LPSPI Driver files
    • LPSPI Peripheral Abstraction Layer (PAL): contains functions and variables that are directly used in main.c or application code. And internally these functions use the LPSPI Low-level drivers & LPSPI IRQ. So if hardware is changed LPSPI PAL would remain same and only internal low-level driver files need to be changed or modified. By this way we don’t have make many changes on application level.
    • LPSPI Low-level driver: contains functions that configures the LPSPI peripheral registers for initializing the peripheral, using the peripheral and processing the data of peripheral at hardware level. These files are the ones which actually interacts with the hardware and make it configurable to our needs. 
      Flow to use LPSPI peripheral in S32K144 MCU

LPSPI PAL

In LPSPI PAL their are 4 files, 2 files for SPI master and 2 files for SPI Slave.

Let’s get into these files:

  1. lpspi_master_driver.h & lpspi_slave_driver.h: Contains the Enum’s, structures and function declarations that would be used in application code. Only functions which are declared in these header files can be used in main.c or application project.
  2. lpspi_master_driver.c & lpspi_slave_driver.c: Contains the function definitions of the declared functions (uses the low-level driver functions) along with some static functions also that are restricted to use in this file only.

Functions

LPSPI Master Functions
  • LPSPI_DRV_MasterInit: This function is first function to be used in main.c or application code to initialize the SPI peripheral in Master Mode.

This function has 3 parameters as follows:

  1. instance: integer number indicating which instance of LPSPI we are going to use.
  2. lpspiState: Structure pointer have to be sent for lpspi_state_t structure
  3. spiConfig: Structure pointer have to be sent for lpspi_master_config_t
  • LPSPI_DRV_SetPcs:

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  • LPSPI_DRV_MasterTransferBlocking

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  • LPSPI_DRV_MasterTransfer

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  • LPSPI_DRV_MasterGetTransferStatus

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  • LPSPI_DRV_MasterIRQHandler

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LPSPI Master data Types

Their are 2 structures that are important and will be used:

  • lpspi_master_config_t:  This structure has members to configure the LPSPI Master according to user defined settings.
  • lpspi_state_t: This structure has data members, which keep track of the on-going transfers . 
LPSPI Slave Functions
  • LPSPI_DRV_SlaveInit

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  • LPSPI_DRV_SlaveTransferBlocking

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  • LPSPI_DRV_SlaveTransfer

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  • LPSPI_DRV_SlaveGetTransferStatus

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  • LPSPI_DRV_SlaveIRQHandler

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LPSPI Slave data Types

Their are 2 structures that are important and will be used:

  • lpspi_slave_config_t:  This structure has members to configure the LPSPI Slave according to user defined settings.

SPI Demo Code in S32K144 MCU

lpspi_dma_s32k144 Demo Code Explanation

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