Clock Peripheral in STM32F103

The main system clock of the microcontroller is the one from which all the other clocks are derived such as clock to AHB domain, clock to APB domain , clock to the USB, clock to the ethernet etc .  This main system clock is referred to as the SYSCLK. As can be seen in the picture of the clock configuration setting the system clock after being chosen is passed through prescalers  it gets divided into a clock source that goes into HCLK that goes into  AHB bus , DMA , cortex system timer ,FCLK. PCLK1 that goes into  APB1 peripherals and timer clocks .PCLK2 that goes into APB2 peripherals and timer clocks and ADC1. Hence it is responsible for operations such as DMA , ADC. These buses are further connected to the pins that are responsible for ADC , GPIO , SPI and other functionality and in case these pins are not being used the clocks to the pin can be disabled to save power

                                                            FIG-1- Clock configuration in stm32cube

To properly drive the SYSCLK there are 3 different sources:-

1. HIGH SPEED INTERNAL (HSI) oscillator clock(Internal to MCU)
2. HIGH SPEED EXTERNAL (HSE) oscillator clock(External to MCU)
3. PHASE LOCKED LOOP(PLL) clock( Internal to MCU) 

There are secondary clock sources as well:-

1. 40KHz low speed internal RC (LSI)  this used to drive watchdog and optionally RTC(Internal to MCU)
2. 32.768 KHz low speed external crystal (LSE)  which drives the RTCclock (RTCCLK) the error involved the LSE is less compared to the LSI( External to MCU)

By default the HSI is ON in the microcontroller whereas all the other clocks HSE, PLL etc are OFF. 

Each clock source can be switched ON or OFF independently when not in use to prevent unnecessary power consumption.

HSI

HSI is the default SYSCLK after startup from RESET state, wakeup from STOP OR STAND BY mode or failure of HSE.

It is a low cost clock source having a start-up time less than HSE. The maximum frequency that can be generated is 8MHz using HSI.

It suffers from the demerit that it is less accurate than external crystal oscillator or ceramic resonator

Also as the temperature increases above 25 degree celsius the accuracy decreases

HSE

In case of high speed application HSE can be used as a clock source for SYSCLK . The HSE or the high speed external clock is an external clock that sometimes comes attached to the microcontroller itself or at times requires the usage of an external circuitry.

HSE is faster and more accurate than HSI but suffers from demerits such as slower startup time, high power consumption and times usage of an external circuitry

The maximum frequency that can be generated using HSE clock is 16MHz

HSE  has 3 states ON , OFF and BYPASS

BYPASS is basically  connecting wire to OSC_IN and putting the OSC_OUT in high impedance state i.e bypassing the crystal oscillator as can be seen in FIG-2 external source

                                                      FIG-2 BYPASS mode in HSE

PLL

The PLL or phase locked loop is a clock system that is capable of providing the clock frequency much higher than that of HSI or HSE i.e in case of stm32f1 series it can go up to 72Mhz

Hence for high speed applications PLL is a go to choice . Also peripherals such as USB, Ethernet PHY can not work using HSI or HSE. PLL provides the flexibility of choosing clock frequency without the help of an external oscillator.

SYSTICK clock 

The SYSTICK is required to generate interrupts on a regular basis . It helps the OS in multitasking applications .In applications without an OS is used for timekeeping, time measurement or as an interrupt source. It is derived from the system clock in stm32 and has an usual value of 16MHz. Which means is to generate a delay of 1sec 16000000 has to be loaded on SysTick load value register