JTAG Vtref Configuration
Hi ,
I am using S32K144 which is operating on 5V.
I just wanted to know if I am correct about the following point.
The Vtref pin must be connected to the segger J-Link(VCC in the segger pinout) to know that the target(S32K114) is operating on 5V logic.
Please correct me if I am wrong.
That's correct. You must connect the VTGT pin of the Elecronics V2 or the Elecronics V3 board to VTREF pin of the segger J-Link for selecting the 5V logic level for signals coming from Segger J-Link. By default, all the Segger J-Link debuggers I've seen are set at 3.3V logic level and also output a supply of 3.3V. You need to supply 5V in order to change the logic level of the signals coming from Segger J-Link.
So VTREF of segger has to be connected to VCC rail of S32K144, right?
The JTAG to SWD connector doesnt make use of 5V-supply, then how will segger power the MCU