About FlexTimer Peripheral of S32K144 MCU: What is FlexTIMER Peripheral? FlexTimer is a peripheral present in NXP S32K1xx MCU’s, which is used for input capture, output capture, generation of PWM signals and time delays. We are going to focus on PWM signals part and usecase of FTM Peripheral for generating PWM signals. As FTM is a peripheral of MCU, so it has intances and with each instance certain number of MCU pins which are referred as channels. In S32K144 their are 4 instances of FTM and each instance has 8 channels. Instances are abrievted as FTM0, FTM1, FTM2 and FTM3. Each Instance has its own Peripheral registers where the configuration of those instances is done. Their are number of registers, in FTM peripheral through which its configuration for different features is done and we also get status. We are not going to dive into every register, will mention important registers, as in industry register level coding is not implemented but understanding of registers is what is important. Each Instance has 8 channels, which are reffered as CH0-CH7. So naming convection goes like this: Table showing FTM Instance and Then FTM Channels of that sinstance and all MCU pins which can be used for that channel. For PWM, FTM Peripheral has following functnalities and features PWM Signal Type: Center Aligned and Edge Aligned PWM Signals: Combine Mode PWM signals in inverted/duplicate PWM Interrupts: Every channel has interrupt source. Interrupt can be generated on counter match or counter overflow. Detection of rising and failing edges of PWM signals: We can configure interrupt generation when counter matches or overflows based on the polaruty of PWM signal. Hardware-Software Trigger: Generation of PWM signals and variation of PWM parameters at the detection of some hardware specific events. Lets say we want to generate PWM pulse only when some ADC readings are taken. So we can configure PWM signal to generate when ADC hardware conversion si done. Fault control and synchronization points. How FTM peripheral works is, For understanding the ftm peripheral features and functionalities we will understand them via storytelling!!! Story telling in terms of what steps have to be followed to use ftm peripheral and correspondingly covering its different features. We configure the clock values for ftm peripheral, that is whether the ftm peripheral is going to get clock from system clock, fixed clock or external clock and also configures the prescaler values, to divide the ftm clock if needed. FTM CLOCK CONFIGURATION IS IMPORTANT step as based on this only, parameters of pwm signals are calculated. Their are 3 inputs of clocks for FTM peripheral: either system clock, or crystal oscillator clock( that is fixed clock) or some external clock ( connected to some pin of MCU). After that we configure in which mode FTM peripheral has to be used, whether input capture mode, output capture mode. Output capture mode is what we are going to use. Output capture mode means outputings some digital signals. And Input capture mode means inputting some digital signals. After output capture mode, which type of pwm signal. These settings are done by setting the values of highlighted bits according to following table. These bits are part of these registers. Based on the mode of ftm peripheral, ftm peripheral will work. As in this module we are learning and focusing on pwm signals, so we highlighted sections of table is what is going to be of our concern. Edge Aligned Mode Center Aligned Mode Combine Mode(Complementary) Each Instance has 8 channels, so every channel has its own peripheral registers by the name of CnSC. In CnSC register this pwm mode of configuration is done. After that, we configure the values into counters of FTM. As stated Timer peripheral has 3 counters in it. MAX counter, Variable counter and Threshold counter. In FTM peripheral MAX counter is MOD peripheral register. Value put on this register determines the frequency /period of pwm signal. Variable register is COUNT peripheral register. This counter starts incrementing from 0 once ftm peripheral is enabled or triggered. Threshol Counter we will touch in couple of mins after. For each channel their is register CnV. This register act as Threshold counter for pwm signal coming from corresponding channel or we can say pin of mcu. Value put on this register will determine the duty cycle of the signal as when COUNT counter matches the value of this register, pwm signal state changes according to configured polarity. Now polarity of pwm channel will determine, whether pwm signal would have high to low transition or low to high transition on counter match. The polarity configuration is important as this will determine the duty cycle parameter. So there are 2 things in polarity, state of pwm signal before counter match and state of pwm signal after counter match. Based on polarity configuration, rising or failing edges would be generated on counter match and counter overflows. 6) Another important thing is updates of counter registers and pwm polarity. You see, counter registers like MOD, CnV and COUNT very much control the PWM signal parameters and PWM polarity register bits control the logic levels of pwm signal. Ftm peripheral has feature to configure when these register values should be updated, that is either on software trigger means software will write the Data on the registers and it would be loaded into them. Or hardware trigger that on detection of sone external signal, the values of these registers would be changed. This updation of register is also called as Reload point of counter registers and values in FTM peripheral. If we are using interrupts then interrupt configuration is also done for each indiviual channel for different events. By events we mean counter match or counter overfflow. For every channels of FTM Instance their are bits in x register, If we set these bits then interrupt functionaly would be on for those Channels. When Counter match happens then channel interrupt handlers are fired and when counter oveflow happens then overflow interrupt handler is fired. Overflow interrupt handler is comman
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So hello guys, welcome back to NXP Semiconductors S32K144 MCU Tutorial series. In the last blog we had started with S32K144 MCU GPIO Peripheral. In this blog we are going to explore the UART Peripheral. Going to Start with UART peripheral. Objective would be to get. familiarity with UART peripheral for S32K144 MCU. Would be understanding UART peripheral from Hardware point of view in S32K144 MCU. Going to understand then how to use UART peripheral via S32K SDK/uart driver. Would also be demonstrating the uart_echo_pall sketch. So read along the blog and do tell me its reviews! Table of Contents UART Peripheral Theory UART is a serial communication protocol which is used to interface external sensor & IoT modules to the Host MCU. IoT modules like: GSM Module, GPS Module, BLE Modules, WiFi Modules are connected to Host MCU via UART protocol. Thus, understanding of UART communication protocol and its driver implementation, plays a crucial role. To know about UART peripheral in theory, viewers can refer to this blog. LPUART Peripheral in S32K144 MCU In S32K144 MCU, UART can be used via 2 peripherals: LPUART & FlexIO. LPUART is referred as Low Power Universal Asynchronous Receiver/Transmitter. LPUART is onchip peripheral only to do UART communication protocol. UART is a serial communication protocol which is done via UART peripheral in the Microcontrollers. Also, in S32K144, there is FlexIO peripheral through which on-board serial communication protocols like UART, I2C & SPI can be emulated. So, through FlexIO peripheral, also UART peripheral can be implemented. To know about FlexIO peripheral in S32K144, refer to this blog. Features of UART via LPUART peripheral in S32K144 MCU: LPUART peripheral of S32K144 supports full duplex mode and has NRZ data encoding (That is Logic 1 bit represents High value and Logic 0 bit represents Low value). It has programmable Baud rates( LPUART peripheral supports Interrupts mode, DMA mode or pooled operation mode for transmitting/receiving the data using LPUART protocol or for detecting below listed errors while LPUART communication session is happening: Transmit data register empty and transmission complete. Receive data register full. Receive overrun, parity error, framing error, and noise error. Idle receivers detect. Active edge on receive pin. Break detect supporting LIN. Receive data match. S32K144 also supports hardware parity generation and checking to ensure the integrity of the data while LPUART communication is happening. It has Programmable LPUART data length of 7-10 bits and LPUART stop bits of 1-2 bits. S32K144 MCU has feature to use the LPUART peripheral to wake up the MCU (if it is programmed in sleep modes), it can be waked up in either of the 3 below mentioned events: Idle line wakeup Address mark wakeup Receive data match. Support of request to send (RTS) and clear to send (CTS) signals, for hardware flow control, example of hardware flow control is a half-duplex radio modem to computer interface. Support of IrDA 1.4 format with programmable pulse width for IR communication. LPUART peripheral of S32K144 supports independent FIFO buffer for transmission and receiving of Data. Also, LPUART peripheral FIFO of S32K144 has additional features like: configurable watermark (lowest number of bytes) for transmit and receive buffer, when watermark is achieved corresponding status is changed of LPUART peripheral. Option for receiver to assert request after a configurable number of idle. characters if receive FIFO is not empty. Tx and Rx FIFO in S32K144 for all LPUART Instances both are of 4 words size. 1 Word is 1 byte(8 bits). So FiFo size is 4 byte long(32 bits). LPUART Hardware Pinout in S32K144 MCU LPUART Pinout and Hardware Instances LPUART peripheral in S32K144 has 3 instances: LPUART0, LPUART1, LPUART2. All the LPUART Instances has 4 pins: RX: Receiving of data TX: Transmission of data CTS: Clear to Send pin for hardware flow control. RTS: Request to Send for hardware flow control. Each LPUART instance supports all the 4 pins, with below mentioned pin details. LPUART0 LPUART1 LPUART2 LPUART0 In LPUART0 there are following number of pins: For RX pin (LPUART Function) there are 3 MCU Pins. For TX (LPUART Function) there are 3 MCU pins For CTS (LPUART Function) there are 2 MCU pins For RTS (LPUART Function) there are 2 MCU pins. LPUART1 In LPUART1 there are following number of pins: For RX pin (LPUART Function) there are 3 MCU Pins. For TX (LPUART Function) there are 3 MCU pins For CTS (LPUART Function) there are 3 MCU pins For RTS (LPUART Function) there are 3 MCU pins. LPUART2 In LPUART2 there are following number of pins: For RX pin (LPUART Function) there are 3 MCU Pins. For TX (LPUART Function) there are 3 MCU pins For CTS (LPUART Function) there are 3 MCU pins For RTS (LPUART Function) there are 3 MCU pins. S32K144 LPUART2 pinout How to use LPUART Pins in S32K144 MCU for doing UART Communication? Now for doing UART communication, we need to connect hardware UART pins of the MCU, for doing so follow the steps: At first select which instance of LPUART wanna use, once selected. As told above their are 3 instances of LPUART in S32K144 MCU. Once selected, then use above excel to short select which pin of corresponding LPUART has to be used. Lets say we use LPUART1 and use PTC7 and PTC6 as Tx & Rx pins of LPUART. So connect these pins of MCU with external UART Module. Remember Tx pin of MCU is connected to Rx pin of external UART Module and Rx pin of MCU is connected to Tx pin of external UART Module. Here i am going to use USB to serial FTDI connector with Original S32K144 evaluation2 board. With ElecronicsV2 board, it has on-board UART driver IC at LPUART1 PTC7 and PTC6 pins. How to configure UART Peripheral in S32K144 using S32 Design Studio IDE UART Peripheral of S32K144 MCU can be configured using the Peripheral configuration tools of S32 Design Studio. These tools provide us with the GUI interface to configure the UART Peripheral of the MCU. To know in
Table of Contents So hello guys, welcome back to NXP Semiconductors S32K144 MCU Tutorial series. In the last blog we just started with S32K144 MCU. In this blog we are going to explore the first peripheral of this MCU. Going to Start with GPIO peripheral. Objective would be to get familiarity with GPIO peripheral for S32K144 MCU. Would be understanding GPIO peripheral from Hardware point of view in S32K144 MCU. Going to understand the how to use GPIO peripheral via S32K SDK/pins driver. Would also be demonstrating the blink LED sketch for GPIO in the end. So read along the blog and do tell me its reviews! GPIO Peripheral Theory General Purpose Input/Output(GPIO) is a crucial peripheral in microcontrollers, enabling interaction with the external world by sending and receiving digital signals. Digital Signals, here are referenced as High and Low Signals. High signal is +5/+3.3V level and Low Signal is 0V level. As MCU’s are digital devices, so it can only understand High and Low Voltage levels. Almost all the pins of the Microcontroller are by default part of the GPIO peripheral, accept from the power pins. Every Pin can be configured in Input or Output State. State of Pins When a pin is configured as Input State, it can detect the level of external signal whether it is high signal or low signal. For example when we press the button, MCU process that as a external signal. Button is connected to one of the GPIO pins of the Microcontroller, which is being configured as Input state and when we press the button a High or Low voltage signal is generated. Which voltage level is generated? is detected by the configured GPIO Pin. When a pin is configured as Output State, it can generate the High Signal or Low Signal to drive the external electronic devices. For example, LEDs are electronic devices which needs High signal to power-on them and low signal to power-off them. So LEDs are connected to one of the GPIO pins of the Microcontroller, which is being configured as Output State and then by programming we can configure the signal that has to be generated from the corresponding configured GPIO pin. Input/output are defacto states of pins, apart from these 2 there are other states too, on which pins can be configured. State of pins can be: Output Input PullUp PullDown Tri-state GPIO pins categorization GPIOs are organized into banks, each requiring a unique identifier to identify a specific pin. These identifiers are commonly referred to as “Ports” and “Pads”. With the vast number of pins available on a microcontroller, it is essential to have a mechanism to reference and utilize them effectively. To simplify this process, GPIO pins are now divided into Ports, with each Port containing a multiple of 8 pins. This division allows for easy referencing and addressing of the pins on the microcontroller. By utilizing this system, developers can efficiently access and manipulate the GPIO pins on a microcontroller, streamlining the development process and improving overall functionality. GPIO In S32K144 MCU In S32K144 MCU, there are 5 ports of GPIO: named as PTA to PTE. Each Port pin has 16 pins. In S32K144 reference manual, GPIO peripheral is being dicided into 2 modules: PORT (Port Control and Interrupt Module) and GPIO (General Purpose Input/Output Module). PORT Module is responsible for Interrupt and Port Control Operations (Like alternate functions, Pull-up/down, drive strength) of the above Ports specified. GPIO module is responsible only for Controlling Input/Output directions of the port pins. Features of GPIO in S32K144 MCU Pins can be configured as Output. Pins can be configured as Input. Pins support the multiplexing of signals, so that a single pin can be do different job(refer to signal multiplexing section). Dedicated Port Output registers for set/clear/toggle the bits. Efficient bit manipulation of the general-purpose outputs is supported through the addition of set, clear, and toggle write-only registers for each port output data register. GPIO module can operate on 3 modes: Run Mode, Stop Mode and Debug Mode GPIO Module is clocked by System clock. GPIO module has a feature of Lock feature, in this feature we can lock the Mode of operation of PIN in one Power Cycle. Registers of GPIO in S32K144 For simplicity, each GPIO port’s register appear with the same width of 32 bits, corresponding to 32 pins. The actual number of pins per port in S32K144 is 16 pins. So we will be addressing only first 16 bits of the registers, on last remaining 16 bits are irrelevant for us. But in S32K144 there are 16 pins only per port, so we will be accessing only first 16 bits of the registers (0-15), reading & writing on (16-31) will have no effect. In S32K144, there are registers to support 8bit, 16-bit and 32-bit access. Registers of GPIO: GPIO Data Direction register: Direction of GPIO pin GPIO output data register: Output direction of GPIO pin GPIO Input Data Register: Displays the logic value on each pin Efficient bit manipulation of the general-purpose outputs is supported through the addition of set, clear, and toggle write-only registers for each port output data register. Each Port of GPIO has 16 pins. And each pin is referenced as each bit of the above registers. Features of Pin configured as Output: Output: Pin is configured for the GPIO Function and corresponding port data direction register bit is set. For efficient bit manipulation, there are dedicated output registers for toggling, Set High or Set LOW the pins. Instead of doing the manipulation of pin signals via software using bit manipulation and shifting Features of Pin Configured as Input Input: If Pin is configured for the GPIO function and the corresponding port data direction register bit is clear. GPIO Hardware/Pinout in S32K144 MCU S32K144 MCU comes in 3 pin counts: S32K144_100lqfp, S32K144_64lqfp, S32K144_48lqfp. The one which we will be using is S32K144_100lqfp. S32K144 EVB board which is explained in last blog, has S32K144 MCU of S32K144_100lqfp packaging.  For GPIO