UART Peripheral in S32K144

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_ _ Rohan Singhal_ 0 Comments

Introduction

–> UART Peripheral is one of the most common communication modules present in every series of microcontrollers. For Crisp and Short UART understanding as a concept, redirect yourself to this BLOG, it might take a couple of minutes to have an overlayed understanding. Now, UART is used in GPS modules or other wireless modules like Bluetooth and WiFi. GPS Modules- Use UART to exchange NMEA strings for positioning data. Bluetooth (e.g., HC-05)- Employs UART for wireless data transfer and pairing. Wi-Fi Modules (e.g., ESP8266, ESP32)- Use UART for sending AT commands and receiving responses.

–> In S32K144, we’ll be referring to the UART as LPUART because the UART supported in S32K144 is a low-power UART called LPUART(Low Power Universal Asynchronous Receiver/Transmitter).

–> NOTE: A single instance of UART contains a pair of a TX pin and an RX pin. 

–> Below are mentioned table of LPUART instances supported in different series with highlighted sections of our development board: 

Features of UART

> Full-Duplex, standard Non-Return-to-Zero (NRZ) format

    • Full-duplex: Communication happens in both directions at the same time. One device can send data while receiving data simultaneously. Yes, as you might be thinking about Half-Duplex Communication and it also exists where the channel can either send or receive data, but not both at the same time. At the same time, there also exists a last type of this which you might not think, that is Simplex Communication where only one-way communication is possible. 

    • Standard Non-Return-to-Zero (NRZ) Format:

      1. Data is represented as high (1) or low (0) voltage levels.
      2. Voltage doesn’t return to zero between bits, ensuring efficient use of the signal without gaps.

 > Programmable baud rates (13-bit modulo divider)

    • Baud Rate: The baud rate is the number of signal changes or symbols transmitted per second in a communication system. For example, a baud rate of 9600 means 9600 bits are sent every second.

    • Baud Rate in LPUART: In LPUART, a 13-bit counter generates the baud rate by dividing the LPUART clock. The division factor is set using the BAUD[SBR] register, with values ranging from 1 to 8191.

      • The baud rate generator is always active when the transmitter or receiver is enabled, and for the transmitter, each character aligns with the next edge of the transmit bit clock. This ensures continuous operation despite minor errors.

    • But there’s a catch that you might see in development, our IDE only gives some preset group of baud rates like 4800, 9600, 19200, 38400, 57600, 115200, 230400, 460800, and 921600, then “what is the use of this baud-rate generator?”. The generator’s role is to provide flexibility to derive these preset baud rates from the main LPUART clock. While only specific baud rates may be officially supported (due to hardware limits or design constraints), the generator’s configuration ensures these values can be accurately achieved by adjusting the divisor (SBR) and oversampling ratio (OSR), which improves accuracy by sampling each bit multiple times. We’ll be discussing the sampling technique in a further section. 

 > Transmission Functionality

    • Now, we’ll be learning how characters are sent over LPUART where we’ll also learn different other features of LPUART. Below mentioned is the Block Diagram of LPUART Transmission:

    • No need to worry by viewing this block diagram, after this go-through you’ll be able to teach others about this block diagram seamlessly. 

    • Idle State and Configuration:

      1. The transmitter output (TXD) is idle at a logic high by default.
      2. To invert this behavior, set the CTRL[TXINV] bit.
      3. The transmitter is enabled by setting CTRL[TE], which queues a preamble (idle state) character.

    • Data Transmission:

      1. Data is written to the transmit buffer via the DATA register.
      2. The transmit shift register (9–13 bits long based on configuration) sends a start bit, data bits, and a stop bit.
      3. In 8-bit mode, the shift register handles 1 start bit, 8 data bits, and 1 stop bit.

    • Operation Flow:

      1. When the shift register is free, it fetches data from the transmit buffer and synchronizes it with the baud rate clock.
      2. The STAT[TDRE] flag is set, indicating readiness for new data.
      3. If no new data is available after sending the stop bit, the transmitter enters idle mode (TXD high).

    • Disabling the Transmitter:

      1. Writing 0  CTRL[TE] doesn’t stop the transmitter immediately.
      2. Current activity (data, idle, or break character) must finish first.

    • Sending Break and Queued Idle in LPUART(Feature offered by LPUART)
      –>       Sending break and queued idle refers to transmitting a break character (a full character of logic 0) or an idle character (logic 1) to manage communication flow, often to signal the end of a message or to wake up sleeping receivers. These actions can be queued by setting control bits in the LPUART, ensuring proper synchronization and transmission.

      1. Break Characters:

        • A break character forces the TX line to logic 0 for a full character time (9–12 bits, including start and stop bits).
        • For a longer 13-bit break, set STAT[BRK13].
        • To send a break:
          • Wait for STAT[TDRE] (Transmit Data Register Empty) to ensure the last character has been shifted out.
          • Set CTRL[SBK] to 1, then clear it to 0. This queues a break for transmission.
        • If CTRL[SBK] remains 1, additional break characters will be queued automatically.
        • Break characters received on RX are detected as all 0s with a framing error (STAT[FE] = 1).

      2. Alternative Break Transmission:

        • Writing to DATA with bit 13 set and all data bits cleared can send a break as part of the data stream.
        • This method also works with DMA to transmit a break character.

      3. Idle Characters:

        • An idle character (logic 1 for a full character time) can wake up sleeping receivers during idle-line wakeup.
        • To send an idle character:
          • Wait for STAT[TDRE].
          • Clear and then set CTRL[TE]. This queues an idle character.
        • The transmitter holds TXD high until the queued idle is sent.

      4. Alternative Idle Transmission:

        • Writing to DATA with bit 13 and all data bits set can send an idle character as part of the data stream.
        • DMA can also be used for idle transmission.

      5. Control Bits for Break Length:

        • The length of break characters depends on the settings in STAT[BRK13], CTRL[M], CTRL[M7], BAUD[M10], and BAUD[SBNS].

    • Hardware Flow Control in LPUART(Feature offered by LPUART)
      –> Hardware flow control helps manage data transmission by using control signals like CTS_B (Clear-to-Send) and RTS_B (Request-to-Send). This ensures that data is sent only when the receiver is ready and prevents data loss.

      1. CTS_B (Clear-to-Send):

        • The transmitter waits for CTS_B to be asserted (set) before sending data.
        • If CTS_B is de-asserted (cleared) during transmission, the current character will still be sent, but the TXD pin will remain idle until CTS_B is reasserted.
        • For a new transmission to start after the transmitter is idle, CTS_B must stay asserted for at least a one-bit period.

      2. Disabling CTS_B:

        • If hardware flow control is disabled (CTS_B is ignored), the transmitter sends data without waiting for CTS_B to assert.

      3. Interaction with RTS_B:

        • The CTS_B signal can be enabled regardless of the state of RTS_B (which controls the receiver’s readiness). This allows independent management of transmission and reception.

    • Transceiver Driver Enable Using RTS_B(Feature offered by LPUART)
      –>       The RTS_B (Request-to-Send) signal can enable the external transceiver’s driver. This is particularly useful in protocols like RS-485, where the transceiver must toggle between sending and receiving.

      1. Operation of RTS_B:

        • When a character is written to the transmitter data buffer, RTS_B asserts (activates) one bit before the start bit is sent.
        • RTS_B stays asserted while data remains in the buffer or during a break character transmission.
        • RTS_B deasserts (deactivates) one-bit time after all data, including the stop bit, is transmitted.

      2. RS-485 Use Case:

        • In RS-485, the transceiver driver is disabled (3-stated) when not transmitting.
        • The RTS_B signal can enable the transceiver driver for data transmission.
        • RTS_B polarity can be adjusted to match the transceiver’s driver enable signal.

      3. Additional Options:

        • RTS_B can also disable the receiver during transmission by connecting it to both DE (Driver Enable) and RE_B (Receiver Enable Bar).
        • Pull-up resistors can stabilize RXD when the receiver is disabled, and single-wire mode can free the RXD pin for other uses.

      –> RTS_B works independently of CTS_B and remains active until all transmissions are complete.

Rohan Singhal
Author: Rohan Singhal

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Rohan Singhal

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