PDB provides controllable delays from either an internal or an external trigger, or a programmable interval tick, to the hardware trigger inputs of ADCs. PDB can also provide pulse outputs that are used as the sample window in the CMP block.
The PDB contains a counter whose output is compared to several different digital values. If the PDB is enabled, then a trigger input eventwill reset the PDB counter and make it start to count. A trigger input event is defined as a rising edge being detected on a selected trigger input source, or if a software trigger is selected and the Software Trigger bit (SC[SWTRIG]) is written with 1