Clock Peripheral in S32K1 Microcontrollers. How to configure Clock in S32K1 Microcontroller. Different Clocks in S32K1 MCU’s
Learn About Cryptography Peripheral in Microcontrollers: The SHE Peripheral (Security Hardware Extension)
How to build and debug a Project in S32 Design Studio IDE
S32 Design Studio Code Configurator Tool tutorial and understanding
OVERVIEW Nowadays we see oled display being used everywhere be it the phones , TVs , laptops or PCs , smartwatches . They sure are better than old chunky CRT TV displays that were bulky and didn’t deliver the desired picture quality , with the introduction of the LCD and backlight LEDs the things sure got better with the chunkiness of the display gone but the picture quality still wasn’t what one desired of but with the release of the OLED display all these problems became a thing of past. OLED or organic light emitting diode were invented in 1987 by Ching Tang and Steven Van Slyke from Kodak but it was until 2004 when SONY released a OLED TV. In fact in CES 2019 , there were some innovative inventions that were released in the OLED domain with the companies trying to come up with foldable display and some exceptional picture quality. TYPES OF OLED Passive Matrix Oled (PMOLED) Pmoleds have strips of cathode , anode and organic layer. The anode strips are perpendicular to cathode strips it is their intersection that makes a pixel . External circuitry applies current to the cathode and anode strips to decide which pixel to light up. They are used in MP3 players , cell phones etc. Active Matrix Oled(AMOLED) Amoleds have full layer of anode and cathode and organic molecules . The anode layer overlaps the TFT matrix array . The TFT array is the matrix circuitry that decides which pixel gets turned on form the image. Since they consume less electricity they are used in TV screens , BillBoards, Computer Monitors. Transparent Oled A Transparent Oled has all the components cathode, anode, substrate transparent and when off the display is 85 percent transparent. When switched ON the display allows the transfer of light in both the directions. Top Emitting Oled The Top Emitting Oled is have substrate that is either opaque or transparent . They are best suited for active matrix design . They are used in smartcards Foldable Oled They are substrate that made of flexible metallic foil , plastic . They are durable and are easier to replace in case of damage . They are used in smart clothing , GPS receivers , IC computers. White Oled They are made of white light that is more uniform and energy efficient rather than fluorescent lights. They posses true color of incandescent lights BESIDES THESE OLEDS ARE ALSO CATEGORIZED ON THE BASIS OF BASE COLOUR Monochrome Blue Monochrome white Yellow Colour NO OF PINS 3 Pins (supports only I2C) 7 Pins(supports both I2C and SPI) BASED ON INTERFACE ICs SSD1306 SSD1331 BASED ON SIZE 0.91 inch(128×32) 0.96 inch(128×64) HOW OLEDs WORKS Both the LCD and OLED have similar display mechanism . The difference lies in the fact that OLED has the smallest display unit made of pixels that are usually 0.3mm x 0.3mm . Inside each pixel they are 3 different type of color filters . When the size of the color filter is reduced then human eye losses its ability to view each color individually and sees them as a mixture. Next each pixel is converted into digital form for future reproduction of the image. Earlier the image reproduction was done using backlight white , colour filters, glass , diffuser . When the light would glow each color filter would light up too. Behind the filters a polarizer lcd sheet is used which reproduces the image , the problem with this was the black colour produced wasn’t exactly black due to the back light being ON constantly . This issue was rectified using tiny light sources for each pixel due to which organic led was used . If we apply positive voltage to the anode termina the electrons would combine with the holes in the LUMO layer producing light. Work is also being done to remove the need for light source and add doping material in the emission layer which will release light of the certain color due to the energy difference in the conduction and valence layer corresponding to their wavelengths FIG -1 SIZE OF A SINGLE PIXEL FIG-2 RGB COLOR FILTERS INSIDE A PIXEL FIG -3 CONVERTING EACH COLOR INTO BINARY FIG -4 CROSS SECTION VIEW OF OLED FIG-5 CHANGING THE ORIENTATION OF THE POLARIZER TO GENERATE DIFFERENT COLORS FIG -6 ELECTRON HOLE PAIR COMBINATION TO GENERATE LIGHT FIG – 7 DOPING OF SUBSTRATE TO GENERATE LIGHT OF VARIOUS WAVELENGTH USE CASES OF OLED DISPLAY Raspberry Pi Based SSD1306 OLED Video PlayerThis project uses Raspberry pi and OpenCv to display videos on the Oled display ESP8266 Weather WidgetThis project used ESP8266 and weather API to display real time weather conditions on the 0.96 inch display. Tinyduino gamepadThe project used joystick , push buttons , arduino uno , custom designed PCB , USB module and ssd display to play games on the tiny 0.96 inch screen Bluetooth SmartwatchThe project uses 0.96 display , bluetooth module , tiny arduino , lipo battery to connect to the phone and display all kinds of medical stats and time Speedometer for bikes The project uses gps module neo6m and ssd1306 display to show speed of the vehicle on the display and raise an alarm in case of overspeeding. HOW TO CONNECT THE DISPLAY WITH THE MICROCONTROLLER WE WILL BE COVERING THE DETAILS ON HOW TO CREATE AN EMBEDDED DRIVER FOR THE DISPLAY IN THE NEXT BLOG . IN THIS WE’LL BE COVERING A BRIEF OVERVIEW OF THE 2 METHODS THAT CAN BE USED TO COMMUNICATE WITH THE DISPLAY. I2C SPI I2C Using I2C we’ll be communicating with the microcontroller by the help of SCL the clock
In previous blog we covered a brief overview of how the OLED display works in microscopic level and also understood various types of OLED displays available in the market . In this blog we’ll be discussing how to configure the SSD1306 display with the microcontroller and we’ll be making the embedded driver as well.128×64 display is a dot matrix display , hence 128×64 =8192 total pixels . It is by turning on/off these pixels we display graphical image of any shape . It is the current provided to each pixel that varies the brightness. HARDWARE DESCRIPTION OLED Display chosen is driven by SSD1306 Driver IC although they are other ICs such as SSD1331 which can be used to drive the display . These ICs are CMOS OLED Driver controller for dot-matrix system . OLED has 256 brightness steps .Besides 128×64 , 128×32 display resolution is also available. Specification of ssd1306 128×64 OLED Display Type: OLED (Organic Light Emitting Diode) Display Size: 128×64 pixels Display Driver: ssd1306 Display Colors: Monochrome (White), Yellow, and Blue Operating Voltage: 3.3V to 5V Interface: I2C Operating Current: ~20mA Display Structure OLED DISPLAY is mapped using GDDRAM page structure OF SSD1306 GDDRAM or graphic display ram is a bit mapped static RAM . It holds the bit pattern to be displayed. The GDDRAM having size 128×64 is divided into 8 pages from PAGE 0 TO PAGE 7 which is used for monochrome matrix display . When data bit D0 – D7 is sent the row0 gets filled with D0 and D7 is written into the bottom row. Display has 64 rows , 128 columns divided into 8 pages . Each page has 128 columns and 8 rows. Display 128 columns known as segments For displaying the graphical data in the first location , page address and column address both are set to 0 with the end address of page and column also being selected End of column and End of the page is 7FH and 07H respectively SSD1306 BLOCK DIAGRAM PIN ARANGEMENT SSD1306 FUNCTIONAL BLOCK DIAGRAM SSD1306 BLOCK DIAGRAM PIN ARANGEMENT SSD1306 FUNCTIONAL BLOCK DIAGRAM ADDRESSING MODE 1. PAGE ADDRESSING MODE 2.Horizontal Addressing Mode 3.Vertical Addressing Mode 1. PAGE ADDRESSING MODE In page addressing mode, after the display RAM is read/written, the column address pointer is increased automatically by 1. If the column address pointer reaches column end address, the column address pointer is reset to column start address but page address pointer not points to next page. Hence, we need to set the new page and column addresses in order to access the next page RAM content. We need to set lower two bits to ‘1’ and ‘0’ for Page Addressing Mode. In page addressing mode, the following steps are required to define the starting RAM access pointer location: Set the page start address of the target display location by command B0h to B7h. Set the lower start column address of pointer by command 00h~0Fh. Set the upper start column address of pointer by command 10h~1Fh 2.Horizontal Addressing Mode In horizontal addressing mode, after the display RAM is read/written, the column address pointer is increased automatically by 1. If the column address pointer reaches column end address, the column address pointer is reset to column start address and page address pointer is increased by 1. When both column and page address pointers reach the end address, the pointers are reset to column start address and page start address We need to set last two digits to ‘0’ and ’0’ for horizontal addressing mode. 3.Vertical Addressing Mode In vertical addressing mode, after the display RAM is read/written, the page address pointer is increased automatically by 1. If the page address pointer reaches the page end address, the page address pointer is reset to page start address and column address pointer is increased by 1. When both column and page address pointers reach the end address, the pointers are reset to column start address and page start address. We need to set last two digits to ‘0’ and ’1’ for vertical addressing mode. In normal display data RAM read or write and horizontal/vertical addressing mode, the following steps are required to define the RAM access pointer location: Set the column start and end address of the target display location by command 21h. Set the page start and end address of the target display location by command 22h. Hardware Pinout SDAThis pin is used to send data between master and slave with the acknowledgement of the master SCLThis is a clock signal that helps keeps the process in synchronization VCCA power supply of 3.3 V is required . More than 3.3V may damage the module GNDThis ground pin is connected to the ground supply ALGORITHM Select the I2C slave address and specify the operation that will be performed i.e Read 0x79 or Write 0x78. #define SSD1306_I2C_ADDR 0x78 Set the clock divide ratio and oscillator frequency . Bit 3-0 sets the clock divide ratio , Bit 7-4 sets the oscillator frequency SSD1306_WRITECOMMAND(0xD5); //–set display clock divide ratio/oscillator frequency SSD1306_WRITECOMMAND(0xF0); //–set divide ratio Set the multiplex ratio switching to any value ranging from 16-63 SSD1306_WRITECOMMAND(0xA8); //–set multiplex ratio(1 to 64) Display start line addressing in which the starting address of the display ram is determined . In our case this is set to zero and RAM row 0 is mapped to col 0 SSD1306_WRITECOMMAND(0x40); //–set start line address Set memory addressing mode using page addressing mode, horizontal addressing mode, vertical addressing mode. SSD1306_WRITECOMMAND(0x10); //00,Horizontal Addressing Mode;01,Vertical Addressing Mode;10,Page Addressing Mode (RESET);11,Invalid SSD1306_WRITECOMMAND(0xB0); //Set Page Start Address for Page Addressing Mode,0-7 Set column address using a triple byte first specifies the column setting , second column start and third column end . Do the same for the page SSD1306_WRITECOMMAND(0x00); //—set low column address SSD1306_WRITECOMMAND(0x10); //—set high column address Set pre-charge period and VCOMH deselect level SSD1306_WRITECOMMAND(0xDB); //–set vcomh Entire display is on using A4H and A5H command SSD1306_WRITECOMMAND(0xA4); //0xa4,Output follows RAM content;0xa5,Output ignores RAM content The normal functionality of the
In the previous blogs we discussed how to read uid of different tags . Now as discussed in the applications of the rfid cards , the rfid tags can be used to store employee information so as to access certain restricted area. The rfid tags can also be used by retail stores to store customer information and points earned with each shopping. In this blog we’ll be learning how data reading or writing works by looking at the memory map of MIFARE 1K Tag and how to read and write the data using rc522. UNDERSTANDING THE MEMORY MAP OF MIFARE 1K TAG The memory of the MIFARE 1K Tag is divided into 15 sectors and each sector is divided into 4 blocks , within each block 16 bytes of data is stored Hence 16 Sectors * 4 Blocks * 16 Bytes=1024 Bytes = 1K The 0th Block of Sector 0 is used to store manufacturer data , this is usually 4 Byte UID(MIFARE 1K TAG, MIFARE Mini Tag) certain tags are available such as MIFARE Plus , MIFARE Desfire etc that has 7 Byte UID There are 3 data blocks presents in each sector and the last block in each sector is known as sector trailer.The 3 data blocks are used to store user data and the trailer block is used to deter mine the access conditions for all the blocks of the sector . The access conditions include Read , Write , Increment , Decrement ,Transfer and Restore. Each sector trailer consists of following information:- A mandatory 6 Byte Key A. 4 Bytes for Access Bits. Optional 6 Byte Key B (if not used, data can be stored). MEMORY ORGANIZATION MANUFACTURER BLOCK SECTOR TRAILER ACCESS CONDITIONS MEMORY ORGANIZATION MANUFACTURER BLOCK SECTOR TRAILER ACCESS CONDITIONS FUNCTIONAL DESCRIPTION uint8_t MFRC522_Write(uint8_t blockAddr, uint8_t *writeData) This function takes in 2 arguments the address to which the data has to be written and the array or buffer in which data is stored lets say this to be writedata array. A 8 bit array of 18 length is also intialized to store data which will be transferred to the memory block. Intially CRC is checked using CalculateCRC function using which takes in 3 arguments array in ( whose first 2 values are PICC Write and blockAddress ), len and output array that stores 2 values CRCResultRegL , CRCResultRegM . Next MFRC522_ToCard function is called which takes in 5 arguments command (in this case that will be PCD_Transceive), send data , send length , back length, back data according to various commands processing is done and according to switch cases status is sent Finally MFRC522_ToCard in again called (with PCD_Transceive) and the data is transferred to the FIFODataReg to return with the correct status and finally the PCD is set to idle uint8_t MFRC522_Read(uint8_t blockAddr, uint8_t *recvData) This function is used to read data from a memory block and and put it into a buffer or array hence the argument recvData Similar to uint8_t MFRC522_Write initially the CRC is calculated and MFRC522_ToCard is called. In MFRC522_ToCard the command argument is set to PCD_TRANSCEIVE due to which the code enter the for loop in which the data that was in FIFODataReg is populated in the recvData Buffer. Finally MFRC522_ToCard in again called (with PCD_Transceive) and the data is transferred to the FIFODataReg to return with the correct status and finally the PCD is set to idle uint8_t MFRC522_ToCard(uint8_t command, uint8_t *sendData, uint8_t sendLen, uint8_t *backData, uint *backLen) This function is used to control the MFRC522 according to the command arguments that can be PCD_AUTHENT PCD_TRANSCEIVE Both these commands have different irqEn ,waitIRq that are written into CommIEnReg block which is then cleared using clear bit mask function After finally setting bit mask the PCD is set to idle state The function writes the data in FIFODataReg to the backData buffer and returns the status which is OK in case of no errors STM32CUBE IDE CONFIGURATION FIG 1- PINOUT CONFIGURATION FIG 2 – CONFIGURING THE SPI1 PERIPHERAL CODE #include “main.h” /* Private includes ———————————————————-*/ /* USER CODE BEGIN Includes */ #include “stdio.h” #include “stm32f1_rc522.h” #include “stdio.h” #include “string.h” #include “fonts.h” #include “ssd1306.h” /* USER CODE END Includes */ /* Private typedef ———————————————————–*/ /* USER CODE BEGIN PTD */ /* USER CODE END PTD */ /* Private define ————————————————————*/ /* USER CODE BEGIN PD */ /* USER CODE END PD */ /* Private macro ————————————————————-*/ /* USER CODE BEGIN PM */ /* USER CODE END PM */ /* Private variables ———————————————————*/ I2C_HandleTypeDef hi2c1; SPI_HandleTypeDef hspi1; UART_HandleTypeDef huart1; /* USER CODE BEGIN PV */ void uprintf(char *str) { HAL_UART_Transmit(&huart1,(uint8_t *)str,strlen(str),100); } //uint8_t i; uint8_t status; uint8_t str[5]; // Max_LEN = 16 uint8_t serNum[5]; uint8_t KEY[] = {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}; uint8_t KEY2[]={1,2,3,4,5,6}; uint8_t W[]=”PRATYUSH”;/STEP 1/ uint8_t R[10]=””;/STEP 2/ uint8_t test; /* USER CODE END PV */ /* Private function prototypes ———————————————–*/ void SystemClock_Config(void); static void MX_GPIO_Init(void); static void MX_SPI1_Init(void); static void MX_USART1_UART_Init(void); static void MX_I2C1_Init(void); /* USER CODE BEGIN PFP */ /* USER CODE END PFP */ /* Private user code ———————————————————*/ /* USER CODE BEGIN 0 */ /* USER CODE END 0 */ /** * @brief The application entry point. * @retval int */ int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration——————————————————–*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_SPI1_Init(); MX_USART1_UART_Init(); MX_I2C1_Init(); /* USER CODE BEGIN 2 */ MFRC522_Init(); /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { status = MFRC522_Request(PICC_REQIDL, str); //MFRC522_Request(0x26, str) status = MFRC522_Anticoll(str); memcpy(serNum, str, 5); HAL_Delay(1000); MFRC522_SelectTag(str); test = MFRC522_Auth(PICC_AUTHENT1A,24,KEY,serNum);/STEP 3/ MFRC522_Write((uint8_t)24 , W);/STEP 4/ HAL_Delay(1000); MFRC522_Read(24, R);/STEP 5/ HAL_Delay(1000); if (status == MI_OK) { MFRC522_SelectTag(str); test = MFRC522_Auth(PICC_AUTHENT1A,2,KEY,serNum); /*if((str[0]==0) &&
Overview In this blog we will be discussing another special functionality of GPIO pins I2C or Inter-Integrated Circuit or I2c functionality . I2C is a two wire interface or TWI which was developed by the Philips corporation for use in consumer products . It is a bidirectional bus that can be easily implemented in an IC process.I2C combines best features of SPI as well as UART it lets the user control multiple slaves via multiple masters which is useful when logging data to sd cards or displaying on LCD. Just like SPI the output data bits are synchronized to sampling of the clock shared by both the parties involved in the communication . The master always generates the clock.The protocol finds applications in hardware sensors or displays , reading memory ICs , communicating with microcontrollers , ADC or DACs. I2C Theory I2C consists of 2 lines SCL and SDA 1.SCL (Serial Clock ) – For synchronizing data transfer between master and slave 2, SDA (Serial Data ) – The data transmission or receiving line Multiple Master and Slave lines are connected to the SDA and SCL lines and both these lines are pulled up using resistors to Vdd (5v) Operation Modes In I2C Master Transmitter Master Receiver Slave Transmitter Slave Receiver I2C Clock Speed The speed of the I2C bus should be in reference to the one provided in the datasheet The modes of I2C clock speed are as follows:- Standard-mode : 100 KHZ max Fast-mode: 400 KHz max Fast-mode Plus:1MHz High-speed mode: 3.4 MHz I2C duty cycle specifies the ratio between Tlow and Thigh of the I2C SCL line The values being: I2C_DUTYCYCLE_2=2:1 I2C_DUTYCYCLE_16_9= 16:9 The desired clock speed can be achieved using the appropriate duty cycle to prescale How data is transmitted in I2C Protocol Transactions are initiated and completed by master All the messages have an address frame and data frame Data is placed on SDA when SCL goes low and is sampled after SCL goes HIGH All transactions begin with START and are terminated by STOP A START is defined when SDA goes low from high and SCL is still HIGH A STOP is define when SDA goes HIGH from LOW while SCL is still HIGH Both START and STOP conditions are generated by the master itself Both START and STOP conditions are generated by the master itself Any information on the SDA lines should be 8 Bits long. Each byte must be followed by Acknowledge(ACK) bit. Data is transferred with the MSB first The address frame is sent out first The 7 bit address frame is sent out with the MSB first followed by R/W indicating a read(1) or write(0) operation. The data frame begins transmission after the address frame is sent The SCL will keep on generating clock pulses at regular interval and data will be placed at SDA at regular interval by either master or slave depending it is a write operation or read operation I2C Features in STM32F103 Parallel-bus/I2C protocol converter Multimaster capability: the same interface can act as Master or Slave I 2C Master features: – Clock generation – Start and Stop generation I 2C Slave features: – Programmable I2C Address detection – Dual Addressing Capability to acknowledge 2 slave addresses – Stop bit detection Generation and detection of 7-bit/10-bit addressing and General Call Supports different communication speeds: – Standard Speed (up to 100 kHz) – Fast Speed (up to 400 kHz) Analog noise filter Status flags: – Transmitter/Receiver mode flag – End-of-Byte transmission flag Error flags: – Arbitration lost condition for master mode – Acknowledgment failure after address/ data transmission – Detection of misplaced start or stop condition – Overrun/Underrun if clock stretching is disabled 2 Interrupt vectors: – 1 Interrupt for successful address/ data communication – 1 Interrupt for error condition Optional clock stretching 1-byte buffer with DMA capability Configurable PEC (packet error checking) generation or verification: – PEC value can be transmitted as last byte in Tx mode – PEC error checking for last received byte SMBus 2.0 Compatibility: – 25 ms clock low timeout delay – 10 ms master cumulative clock low extend time – 25 ms slave cumulative clock low extend time – Hardware PEC generation/verification with ACK control – Address Resolution Protocol (ARP) supported PMBus Compatibility I2C Instances in STM32F103 The I2C instances vary from microcontroller to microcontroller i.e the stm32f103c676A has one I2c instance with stm32 f411 RE having I2C1 and I2C2 . The pins for I2C1 are PB7 – This is used as SDA PB6 – This is used as SCL The pins for I2C2 are:- PB3 – This is used as SDA PB10 – This is used as SCL I2C configuration Parameters in STM32F103 Clock Speed This parameter defines the clock speed which as mentioned previously can be 100000 in standard mode and 400000 fast mode. Duty cycle This parameter helps in configuring the HIGH and LOW ratio of the clock and has value 2:1 and 16:9 Ownaddress This parameter takes in the address of the first device which can be 7 bit or 10 bit long Addressing mode This parameter suggests the type of the address size being chosen which can be 7 bit or 10 bit Dualaddressing mode This parameter is used to disable or enable the dual addressing mode of I2C Generalcall addressing mode This parameter is used to disable or enable the general call addressing mode. NOstrech mode This parameters checks the nostrech mode Applications of I2C It is used to scan sensors such as – MPU6050 , BMP280 , PCA 9685 PWM controller, TSL2561 luminosity measurements ADXL345 3 axis accelerometer Ssoled display , 16 x 2 led display CAT24C512 EEPROM 64KB SSD1306 OLED Screen with STM32F103 GEsture sensor with STM32F103 Time of Flight Sensor with STM32F103 INA219 DC Current Sensor with STM32F103 How to configure the I2C peripheral in STM32F103 We would be using STM32 HAL and STM32CubeIDE for using the I2C peripheral in STM32F103 in this blog tutorial series. I2C BLOCK DIAGRAM I2C
Overview So, in this blog we will be covering another alternate functionality of GPIO pins i.e SPI (Serial Peripheral Interface). Previously we hve covered following peripherals implementation in STM32F103 MCU’s. ADC(Analog To Digital Converter) in STM32F103 UART Peripheral in STM32F103 GPIO Peripheral in S32K144 MCU Clock Peripheral in STM32F103 PWM on STM32F103 SPI is a synchronous and full duplex communication between a master and several slave devices. It is used in devices or sensors in which speed is a priority . It operates at data transmission rate 8 Mbits or more. The protocol uses 3 or usually 4 wires for data transmission and receiver .It is used by various sensors and modules such as OLED Display, BMP280 , RC522 , DAC , Shift Registers etc. SPI Theory The SPI uses 2 pins for data transfer SDIN and SDO , SCLK clock for synchronization of data transfer between 2 chips, CE chip select that is used to initiate and terminate the data transfer. SDI = MOSI SDO = MISO SCLK = SCK CE = SS MOSI: MASTER OUT SLAVE IN This pin is used to send data from master to slave MISO: MASTER IN SLAVE OUT Lorem ipsum dolor sit amet, consectetur adipisi cing elit, sed do eiusmod tempor incididunt ut abore et dolore magna SCK: SERIAL CLOCK This is used to generate clock to synchronize data transfer between the master and slave device . This is generated by master SS:SLAVE SELECT Used to select the particular slave to send data . Besides SPI communication the SPI interface can switch between I2S communication protocol that is a synchronous serial communication interface. It supports 4 audio standards including the I2S Philips standard, the MSB- and LSB-justified standards, and the PCM standard. The operating modes can be full duplex(4 wires) and half duplex (6 wires) Multi Mode Configuration Multiple subnodes can be used with a single SPI main. The subnodes can be connected in regular mode or daisy-chain mode. How Data is Transmitted in SPI Initially SCK is enabled that starts the transmission The master sets the SS line low of the slave Data is usually shifted out with most significant bit first , shifting a new least significant bit into the same register Data in slave side is shifted into least significant bit of the register Hence after all the shifting is done the master and slave has transferred the data If more data is to be exchanged the registers are reloaded and the process is repeated When no more data transmission is there the master stops toggling the SCK and deselects the slave using SS SPI Peripheral Bus Modes Before discussing about the various bus modes we will be discussing the clock phase and polarity i.e CPOL:Clock Polarity and CPHA:Clock Phase and it is the combination of CPOL and CPHA that is referred to as Bus Modes. CPOL = 0 Active state of clock = 1 Idle state of clock= 0 Means the sampling on the first edge CPHA = 0 – Data is captured on the rising edge and output on falling edge CPHA = 1 – Data is captured on the falling edge and output on the rising edge CPOL = 1 Active state of clock = 0 Idle state of clock = 1 Means sampling is on the second edge CPHA = 0 – Data is captured on the falling edge and output on rising edge CPHA = 1 – Data is captured on the rising edge and output on the falling edge SPI Features in STM32F103 Full-duplex synchronous transfers on three lines Simplex synchronous transfers on two lines with or without a bidirectional data line 8- or 16-bit transfer frame format selection Multimaster mode capability 8 master mode baud rate prescalers (fPCLK/2 max.) Slave mode frequency (fPCLK/2 max) Faster communication for both master and slave NSS management by hardware or software for both master and slave: dynamic change of master/slave operations Programmable clock polarity and phase Programmable data order with MSB-first or LSB-first shifting Dedicated transmission and reception flags with interrupt capability SPI bus busy status flag Hardware CRC feature for reliable communication: – CRC value can be transmitted as last byte in Tx mode – Automatic CRC error checking for last received byte Master mode fault, overrun and CRC error flags with interrupt capability 1-byte transmission and reception buffer with DMA capability: Tx and Rx requests SPI Instances in STM32F103 SPI instances vary from microcontroller to microcontroller from 1 in stmf103c6t6a to 6 in stm32f7 each having different pins NSS pulse mode , TI mode and hardware crc calculations SPI1 features PA5 as SCK , PA6 as MOSI and PA7 as MISO SPI2 features PB3 as SCK, PB4 as MISO and PB5 as MOSI. NSS Management in SPI protocol for STM32F103 NSS line can to be driven via 2 modes Software Mode- SS is driven internally by firmware Hardware Mode – A dedicated GPIO pin is used to drive the SS line Also NSS features NSS output and output disabled mode. Output mode is used only when device operates in master mode and it is disabled allowing mutli master capability NSS hardware mode must be used in TI mode . CPHA and CPOL are forced to conform to Texas Instrument (TI) protocol requirements. In this NSS signal pulses at the end of every transmitted byte APPLICATIONS OF SPI PROTOCOL Application 1 Memory Devices- SD-Card, MMC, EEPROM and FLASH Application 2 Sensors- Temperature and pressure (BMP280) Application 3 Control Devices -ADC, DAC, Audio Codec Application 4 Others- Camera Lens , RTC, LCD , Touch Screen RFID Module interfacing with STM32F103 W25Q SPI Flash Memory ST77389 LCD Display with STM32F103 NRF24L01 RF Module with STM32F103 How to Configure SPI Peripheral for STM32F103 We would be using STM32 HAL and STM32CubeIDE for using the SPI peripheral in STM32F103 in this blog tutorial series. SPI BLOCK DIAGRAM SPI CONFIGURATION ALERNATE FUNCTION MAPPING CONFIGURATION IN STM32CUBEIDE FIG 1- Selecting MOSI, MISO , SS and SCK pins
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