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Important terminologies

  1. What are ADC Channels?
  2. Hardware Interleaving in ADC
  3. Single Conversion vs Continuous Conversion:

ADC Peripheral overview in NXP S32K144 MCU

  • In S32K144 has 12-bit ADC of linear successive approximation.
  • Upto 32 single ended external analog pins
  • ADC resolution is configurable from 8-bit,10-bit to 12-bit.
  • Single or continuous conversion modes.
  • Configurable sample time and conversion speed/power.
  • Selectable hardware conversion trigger with hardware channel select.
  • In NXP S32K144 MCU there are 2 ADC ports: ADC0 & ADC1
  • Depending upon the package of S32K144 their would be different ADC channels in ADC ports:
ADC channels in S32K144 MCU
  • ADC has DMA support in S32K144 MCU
  • In S32K144 their are Interleaved ADC’s. Their are 4 ADC channels:
  1. ADC0_SE4 and ADC1_SE14 channels are interleaved on PTB0 pin
  2. ADC0_SE5 and ADC1_SE15 channels are interleaved on PTB1 pin
  3. ADC1_SE8 and ADC0_SE8 channels are interleaved on PTB13 pin
  4. ADC1_SE9 and ADC0_SE9 channels are interleaved on PTB14 pin.
  • ADC has multiple trigger sources in S32K144. By trigger we mean by that a event occurs that will trigger/start the ADC peripheral to start the ADC conversation.
  • Triggers in ADC can be generated via PDB or TRGMUX to provide flexible trigger schemes.
  1. PDB can generate triggers for ADC.
  2. CMP out, LPIT, RTC and LPTMR are capable of triggering each ADC via TRGMIX(DMA).

ADC Power/Signals

  1. Analog Power
  2. Analog Ground
  3. Voltage Reference Select
  4. Analog Channel Inputs

Functional Description

The ADC can perform an analog-to-digital conversion on any of the software selectable channels. All modes perform conversion by a successive approximation algorithm.

To meet accuracy specifications, the ADC module must be calibrated using the on-chip calibration function.

  • Calibration Functions

a) 

  • Clock Select and divide control

a) One of four clock sources can be selected as the clock source for the ADC module. This clock source is then divided by a configurable value to generate the input clock ADCK, to the module.
b) The clock is selected by configuring CFG1[ADICLK]. ALTCLKx, defined for this MCU
  • Voltage Reference selection

a) The ADC can be configured to accept one of the two voltage reference pairs as the reference voltage (VREFSH and VREFSL) used for conversions.

b) . These voltage references are selected using SC2[REFSEL].

Trigger in ADC

What are triggers in ADC?

triggers are some events which starts the ADC conversion. These events can be external signals to Microcontroller or some internal signals of the microcontroller.

By external signal, we basically mean Hardware signals like external PWM signals and by internal signals, we basically mean software signals that can be raised because of events like timer/counter overflow, RTC clock getting hit, CMP out and etc.

So broadly their are 2 triggers in ADC for Microcontrollers:

  1. Hardware trigger
  2. Software trigger

Hardware triggers are the off-chip events, after which ADC conversion starts. These events are external signals that are received by microcontroller.

Software triggers are on-chip events , after which ADC conversion starts. these events are internal signals of microcontroller like Timer/Counter getting overflowed, RTC getting hit, CMP out and etc.

 

Triggers in NXP S32K144 MCU

In S32K144 the triggers are connected trhough PDB or TRGMUC to provide flexible trigger schemes.

There are 2 types of triggers used for initiating a conversion. Two types of triggers can be selected:
Software trigger: When software trigger is selected, a conversion is initiated following a write to SC1A.
Hardware trigger: When hardware trigger is selected, a conversion is initiated following the
assertion of the ADHWT input after a pulse of the ADHWTSn input

ADHWT input is enabled when SC2[ADTRG] is set(that is when hardware trigger is selected, then ADHWT input is enabled.

pulse of ADHWTSn input is hardware trigger select event. So ADHWTSn refers to the hardware trigger select event which must be set prior to the setting of the ADHWT signal.

Software Trigger in ADC

In software trigger, we select the trigger method of ADC as software. This is done by clearing the bit ADTRG of SC2 register. In software trigger Host MCU will write value to the SC1A register of the ADC peripheral.

Writing to SC1A register, will start the ADC conversion and we can poll around the COCO bit of SC1A register (Tells whether ADC Conversion is completed or not) and ADACT bit of SC2 register (Tells whether ADC conversion is initiated or not). Both of these bit should be set to 1, indicating ADC conversion is done.

And we can read the ADC data from RA register of the ADC peripheral.

Hardware Trigger in ADC

  • Hardware Triggers are connected through PDB or TRGMUX to provide flexible trigger schemes.
  • When hardware trigger is selected, a conversion is initiated following the assertion of the ADHWT input after a pulse of the ADHWTSn input.

What is PDB?

PDB provides controllable delays from either an internal or external trigger, or a programmable interval tick  to the hardware trigger inputs of ADCs

PDB trigger source selection is done through TRGMUX peripheral.

In case of PDB, we have 2 TRGMUX control registers:

  1. TRGMUX PDB0 Register
  2. TRGMUX PDB1 Register

So, using these 2 registers we will configure the trigger sources for PDB peripheral via TRGMUX. And in each trigger control register of PDB we can configure upto 1 trigger source only.

Trigger sources for PDB via TRGMUX can be:

  1.  

What is TRGMUX?

In case of ADC, we have 2 TRGMUX trigger control registers:

  1. TRGMUX_ADC0 Register (ADC0)
  2. TRGMUX_ADC1_Register (ADC1)

So using these 2 registers we will configure the trigger source for ADC peripheral via TRGMUX. And in each Trigger control register of ADC we can configure upto 4 trigger sources.

Each register is of 32 bits, in which we write values according to SELx bits to configure which trigger source would be used to trigger the ADC conversion.

Trigger sources for ADC via TRGMUX can be:

  1. LPIT_CH0, LPIT_CH1, LPIT_CH2 and LPIT_CH3
  2. LPTMR0
  3. PDB0_CH0_TRIG and PDB0_PULSE_OUT
  4. PDB1_CH0_TRIG and PDB1_PULSE_OUT
  5. CPM0_OUT
  6. RTC_alarm and RTC_second

What is ADHWTSn input?

what is relation between ADHWTS input and PDB?

What is trigger and pretrigger in ADC?

Hardware triggering schemes supported in ADC are:

  1. Default hardware triggering scheme uses the PDB to trigger the ADC.
  2. Another hardware triggering scheme is to use the TRGMUX. CMP out, LPIT, RTC and LPTMR are capable of triggering each ADC via TRGMUX.

SIM_ADCOPT[ADCxTRGSEL] field is used to control the ADC triggering source/scheme.

ADC Demo codes:

  1. ADC conversion via software trigger
  2. ADC conversion via hardware trigger using TRGMUX using LPIT CH0
  3. ADC conversion via hardware trigger using TRGMUX using RTC
  4. ADC conversion via hardware trigger using TRGMUX using CMP_Out
  5. ADC conversion via hardware trigger using TRGMUX using LPTMR0.
  6.  
Kunal Gupta
Author: Kunal Gupta

Author

Kunal Gupta

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