PORT Peripheral in S32K144
PORT Introduction
–> The Port Control and Interrupt (PORT) module supports port control, digital filtering, and external interrupt functionalities. It allows configuration for each pin in a 32-bit port independently of its pin muxing state. Each port has one instance of the PORT module, though not all pins may be implemented on every device.
–> Before going through technical details, let’s have a crisp gist of a what exactly PORT peripheral is. PORT peripheral is a role assigner through which we assign parameters to the pins of the microcontroller. Through parameters, we are referring to the peripheral functionality of pins. Each pin has its unique mathematically calculated value called PCR value. Using this PCR value(unique name), we tell PORT peripheral what properties are to be assigned to those pins. These properties or features can be understood in the “Features of PORT” section in detail but the most important property is assigning the mode of operation for a pin.
Features of PORT
Functional Explanation of PORT
1. Pin Control
–> Each port pin has a corresponding Pin Control Register, PORT_PCRn, which manages both interrupt/DMA request settings and specific pin functions within the 32-bit port. The upper half of PORT_PCRn configures interrupt or DMA request settings, allowing triggers on rising, falling, or both edges, along with an interrupt flag. The lower half controls pullup/pulldown resistors, drive strength, passive input filter enable, and Pin Muxing mode selection. Pin configurations in the register remain active even when the PORT module is disabled.
–> Pin muxing mode overrides all digital functions (including pullup/pulldown resistors and buffer enable) when set to analog or disabled, lowering power consumption. The LK bit in PORT_PCRn locks pin configuration until the next system reset. When using digital modes, input buffers are enabled, allowing pin states to be read through GPIO_PDIR(GPIO Port Data Input Register). Floating pins can increase power consumption and should be grounded with an internal or external pull resistor.
2. Global Pin Control
–> The global pin control registers enable quick configuration of up to 16 pins with a single write operation, applying the same value to the lower half of each pin control register in the selected port. This feature is useful for setting multiple pins for the same peripheral function efficiently, though it cannot configure interrupt functions. Registers locked individually cannot be modified via the global pin control registers. These registers are write-only and return 0 when read.
3. Global Interrupt Control
–> The global interrupt control registers allow efficient configuration of the upper half of the pin control registers for up to 16 pins in a port with a single write, applying the same interrupt settings to each selected pin. They enable streamlined setup for consistent interrupt configurations across multiple pins but cannot be used to configure other pin control functions. These registers are write-only and return 0 when read.
4. External interrupts
–> The PORT module’s external interrupt capability is available in all digital pin muxing modes when enabled. Each pin can be individually configured for various interrupt modes, including:
- Interrupt disabled (default on reset)
- Level-sensitive interrupt: Active high or active low
- Edge-sensitive interrupt: Rising, falling, or both edges
- DMA requests: Rising, falling, or both edge sensitivity
–> When the configured edge or level is detected (filtered if digital input filter is enabled), the interrupt status flag is set. In normal modes, the input synchronizes with the bus clock for detection.
–> The PORT generates a single interrupt when any enabled interrupt flag is set, and it clears when all flags are cleared by writing 1
to the ISF flag in PORT_ISFR
or PORT_PCRn
. Similarly, a single DMA request asserts when an interrupt status flag for an enabled DMA request is set and negates once the DMA transfer completes.
–> In Stop mode, an enabled interrupt’s status flag is set asynchronously if the required edge or level is detected, generating a wake-up signal to exit Low-Power mode.
5. Digital Filter
–> The digital filter in the PORT module operates in all digital pin muxing modes when the PORT module is enabled. Key points:
- Clock Source: Configurable between bus clock or LPO clock for each port. If using the bus clock, digital filters are bypassed during Stop mode, where filter outputs match input pins, but filter states remain static.
- Filter Width: Uniform for all digital filters on a port and adjustable only when all filters on that port are disabled.
- Operation: Filter output starts as logic zero after reset or when disabled. Once enabled, the input synchronizes with the filter clock. If the input remains stable for the configured filter width, the filter output updates to match it.
–> The maximum latency for a filter output update is three clock cycles plus the configured filter width.
Author: Rohan Singhal
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